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56F8025 Datasheet(PDF) 4 Page - Freescale Semiconductor, Inc |
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56F8025 Datasheet(HTML) 4 Page - Freescale Semiconductor, Inc |
4 / 12 page 56F8025 Digital Signal Controller Product Brief, Rev. 0 Preliminary—Subject to Change Without Notice Peripheral Circuits for 56F8025 Freescale Semiconductor 4 • Two independent 12-bit Analog-to-Digital Converters (ADCs) — 2 x 4 channel inputs — Supports both simultaneous and sequential conversions — ADC conversions can be synchronized by both PWM and timer modules — Sampling rate up to 2.67MSPS — 16-word result buffer registers • Two internal 12-bit Digital-to-Analog Converters (DACs) — 2 microsecond settling time when output swing from rail to rail — Automatic waveform generation generates square, triangle and sawtooth waveforms with programmable period, update rate, and range • One 16-bit multi-purpose Quad Timer module (TMR) — Up to 96MHz operating clock — Eight independent 16-bit counter/timers with cascading capability — Each timer has capture and compare capability — Up to 12 operating modes • One Queued Serial Communication Interface (QSCI) with LIN Slave functionality — Full-duplex or single-wire operation — Two receiver wake-up methods: – Idle line – Address mark — Four-bytes-deep FIFOs are available on both transmitter and receiver • One Queued Serial Peripheral Interfaces (QSPI) — Full-duplex operation — Master and slave modes — Four-words-deep FIFOs available on both transmitter and receiver — Programmable Length Transactions (2 to 16 bits) • One Inter-Integrated Circuit (I2C) port — Operates up to 400kbps — Supports both master and slave operation — Supports both 10-bit address mode and broadcasting mode • Three 16-bit Programmable Interval Timers (PITs) • Two analog Comparators (CMPs) — Selectable input source includes external pins, DACs — Programmable output polarity — Output can drive Timer input, PWM fault input, PWM source, external pin output and trigger ADCs |
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Similar Description - 56F8025 |
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