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DS3984Z Datasheet(PDF) 4 Page - Dallas Semiconductor |
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DS3984Z Datasheet(HTML) 4 Page - Dallas Semiconductor |
4 / 24 page 4-Channel Cold-Cathode Fluorescent Lamp Controller 4 _____________________________________________________________________ I2C AC ELECTRICAL CHARACTERISTICS (See Figure 9) (VCC = +4.5V to +5.5V, timing referenced to VIL(MAX) and VIH(MIN), TA = -40°C to +85°C.) Note 1: All voltages are referenced to ground, unless otherwise noted. Currents into the IC are positive, out of the IC negative. Note 2: During fault conditions, the AC-coupled feedback values are allowed to be outside the Absolute Max Rating of the LCM or OVD pin for up to 1 second. Note 3: Voltage with respect to VDCB. Note 4: This is the minimum pulse width guaranteed to generate an output burst, which will generate the DS3984’s minimum burst duty cycle. This duty cycle may be greater than the duty cycle of the PSYNC input. Once the duty cycle of the PSYNC input is greater than the DS3984’s minimum duty cycle, the output’s duty cycle will track the PSYNC’s duty cycle. Leaving PSYNC low (0% duty cycle) disables the GAn and GBn outputs in DPWM Slave mode. Note 5: This is the maximum lamp frequency duty cycle that will be generated at any of the GAn or GBn outputs. Note 6: I2C interface timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I2C stan- dard-mode timing. Note 7: After this period, the first clock pulse can be generated. Note 8: CB—total capacitance allowed on one bus line in picofarads. Note 9: EEPROM write time applies to all the EEPROM memory. EEPROM write begins after a stop condition occurs. Note 10: Guaranteed by design. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SCL Clock Frequency fSCL (Note 6) 0 400 kHz Bus Free Time Between Stop and Start Conditions tBUF 1.3 µs Hold Time (Repeated) Start Condition tHD:STA (Note 7) 0.6 µs Low Period of SCL tLOW 1.3 µs High Period of SCL tHIGH 0.6 µs Data Hold Time tHD:DAT 0 0.9 µs Data Setup Time tSU:DAT 100 ns Start Setup Time tSU:STA 0.6 µs SDA and SCL Rise Time tR (Note 8) 20 + 0.1CB 300 ns SDA and SCL Fall Time tF (Note 8) 20 + 0.1CB 300 ns Stop Setup Time tSU:STO 0.6 µs SDA and SCL Capacitive Loading CB (Note 8) 400 pF EEPROM Write Time tW (Note 9) 20 30 ms NONVOLATILE MEMORY CHARACTERISTICS (VCC = +4.5V to +5.5V) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS EEPROM Write Cycles +70°C (Note 10) 50,000 Cycles |
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