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## ISL6322 Datasheet(PDF) 12 Page - Intersil Corporation

 Part No. ISL6322 Description Four-Phase Buck PWM Controller with Integrated MOSFET Drivers and I2C Interface for Intel VR10, VR11, and AMD Applications Download 41 Pages Scroll/Zoom 100% Maker INTERSIL [Intersil Corporation] Homepage http://www.intersil.com/cda/home Logo

## ISL6322 Datasheet(HTML) 12 Page - Intersil Corporation

 12 / 41 page 12FN6328.0August 21, 2006pulse is terminated 1/3 of a cycle after the PWM pulse of theprevious phase. The peak-to-peak current for each phase isabout 7A, and the DC components of the inductor currentscombine to feed the load.To understand the reduction of ripple current amplitude in themultiphase circuit, examine the equation representing anindividual channel peak-to-peak inductor current.In Equation 1, VIN and VOUT are the input and outputvoltages respectively, L is the single-channel inductor value,and fS is the switching frequency.The output capacitors conduct the ripple component of theinductor current. In the case of multiphase converters, thecapacitor current is the sum of the ripple currents from eachof the individual channels. Compare Equation 1 to theexpression for the peak-to-peak current after the summationof N symmetrically phase-shifted inductor currents inEquation 2. Peak-to-peak ripple current decreases by anamount proportional to the number of channels. Outputvoltage ripple is a function of capacitance, capacitorequivalent series resistance (ESR), and inductor ripplecurrent. Reducing the inductor ripple current allows thedesigner to use fewer or less costly output capacitors.Another benefit of interleaving is to reduce input ripplecurrent. Input capacitance is determined in part by themaximum input ripple current. Multiphase topologies canimprove overall system cost and size by lowering input ripplecurrent and allowing the designer to reduce the cost of inputcapacitance. The example in Figure 2 illustrates inputcurrents from a three-phase converter combining to reducethe total input ripple current.The converter depicted in Figure 2 delivers 1.5V to a 36A loadfrom a 12V input. The RMS input capacitor current is 5.9A.Compare this to a single-phase converter also stepping down12V to 1.5V at 36A. The single-phase converter has 11.9ARMS input capacitor current. The single-phase convertermust use an input capacitor bank with twice the RMS currentcapacity as the equivalent three-phase converter.Active Pulse Positioning (APP) Modulated PWMOperationThe ISL6322 uses a proprietary Active Pulse Positioning(APP) modulation scheme to control the internal PWMsignals that command each channel’s driver to turn theirupper and lower MOSFETs on and off. The time interval inwhich a PWM signal can occur is generated by an internalclock, whose cycle time is the inverse of the switchingfrequency set by the resistor between the FS pin andground. The advantage of Intersil’s proprietary Active PulsePositioning (APP) modulator is that the PWM signal has theability to turn on at any point during this PWM time interval,and turn off immediately after the PWM signal hastransitioned high. This is important because is allows thecontroller to quickly respond to output voltage dropsassociated with current load spikes, while avoiding the ringback affects associated with other modulation schemes.The PWM output state is driven by the position of the erroramplifier output signal, VCOMP, minus the current correctionsignal relative to the proprietary modulator ramp waveformas illustrated in Figure 3. At the beginning of each PWM timeinterval, this modified VCOMP signal is compared to theinternal modulator waveform. As long as the modifiedVCOMP voltage is lower then the modulator waveformvoltage, the PWM signal is commanded low. The internalMOSFET driver detects the low state of the PWM signal andturns off the upper MOSFET and turns on the lowersynchronous MOSFET. When the modified VCOMP voltagecrosses the modulator ramp, the PWM output transitionshigh, turning off the synchronous MOSFET and turning onthe upper MOSFET. The PWM signal will remain high untilthe modified VCOMP voltage crosses the modulator rampagain. When this occurs the PWM signal will transition lowagain.During each PWM time interval the PWM signal can onlytransition high once. Once PWM transitions high it can nottransition high again until the beginning of the next PWMtime interval. This prevents the occurrence of double PWMpulses occurring during a single period.To further improve the transient response, ISL6322 alsoimplements Intersil’s proprietary Adaptive Phase Alignment(APA) technique, which turns on all phases together undertransient events with large step current. With both APP andAPA control, ISL6322 can achieve excellent transientperformance and reduce the demand on the outputcapacitors.IPPVINVOUT–() VOUT⋅LfSV⋅IN⋅----------------------------------------------------------=(EQ. 1)ICPP,VINNVOUT⋅–() VOUT⋅LfSV⋅IN⋅--------------------------------------------------------------------=(EQ. 2)FIGURE 2. CHANNEL INPUT CURRENTS ANDINPUT-CAPACITOR RMS CURRENT FOR3-PHASE CONVERTERCHANNEL 1INPUT CURRENT10A/DIVCHANNEL 2INPUT CURRENT10A/DIVCHANNEL 3INPUT CURRENT10A/DIVINPUT-CAPACITOR CURRENT, 10A/DIV1μs/DIVISL6322ISL6322

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