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ISL6322 Datasheet(PDF) 11 Page - Intersil Corporation

Part No. ISL6322
Description  Four-Phase Buck PWM Controller with Integrated MOSFET Drivers and I2C Interface for Intel VR10, VR11, and AMD Applications
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Maker  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
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ISL6322 Datasheet(HTML) 11 Page - Intersil Corporation

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11
FN6328.0
August 21, 2006
PHASE1, PHASE2, and PHASE3
Connect these pins to the sources of the corresponding
upper MOSFETs. These pins are the return path for the
upper MOSFET drives.
LGATE1, LGATE2, and LGATE3
These pins are used to control the lower MOSFETs. Connect
these pins to the corresponding lower MOSFETs’ gates.
PWM4
Pulse-width modulation output. Connect this pin to the PWM
input pin of an Intersil driver IC if 4-phase operation is
desired.
EN_PH4
This pin has two functions. First, a resistor divider connected
to this pin will provide a POR power-up synch between the
on-chip and external driver. The resistor divider should be
designed so that when the POR-trip point of the external
driver is reached the voltage on this pin should be 1.21V.
The second function of this pin is disabling PWM4 for
3-phase operation. This can be accomplished by connecting
this pin to a +5V supply.
SS/RST/A0
This pin has three different functions associated with it. The
first is that a resistor (RSS), placed from this pin to ground, or
VCC, will set the soft-start ramp slope for the Intel DAC
modes of operation. Refer to Equations 18 and 19 for proper
resistor calculation.
The second function of this pin is that it selects which of the
two 8-bit Slave I2C addresses the controller will use.
Connecting the RSS resistor on this pin to ground will
choose slave address one(1000_110x), while connecting
this resistor to VCC will select slave address
two(1000_111x).
The third function of this pin is a reset to the I2C registers.
During normal operation of the part, if this pin is ever
grounded, all of the I2C registers are reset to 0000_0000. An
open drain device is recommended as the means of
grounding this pin for resetting the I2C registers.
SCL
Connect this pin to the clock signal for the I2C bus, which is
a logic level input signal. The clock signal tells the controller
when data is available on the I2C bus.
SDA
Connect this pin to the bidirectional data line of the I2C bus,
which is a logic level input/output signal. All I2C data is sent
over this line, including the address of the device the bus is
trying to communicate with, and what functions the device
should perform.
PGOOD
During normal operation PGOOD indicates whether the
output voltage is within specified overvoltage and
undervoltage limits. If the output voltage exceeds these limits
or a reset event occurs (such as an overcurrent event),
PGOOD is pulled low. PGOOD is always low prior to the end
of soft-start.
Operation
Multiphase Power Conversion
Microprocessor load current profiles have changed to the
point that using single-phase regulators is no longer a viable
solution. Designing a regulator that is cost-effective,
thermally sound, and efficient has become a challenge that
only multiphase converters can accomplish. The ISL6322
controller helps simplify implementation by integrating vital
functions and requiring minimal external components. The
block diagram on page 3 provides a top level view of
multiphase power conversion using the ISL6322 controller.
Interleaving
The switching of each channel in a multiphase converter is
timed to be symmetrically out of phase with each of the other
channels. In a 3-phase converter, each channel switches 1/3
cycle after the previous channel and 1/3 cycle before the
following channel. As a result, the three-phase converter has
a combined ripple frequency three times greater than the
ripple frequency of any one phase. In addition, the
peak-to-peak amplitude of the combined inductor currents is
reduced in proportion to the number of phases (Equations 1
and 2). Increased ripple frequency and lower ripple
amplitude mean that the designer can use less per-channel
inductance and lower total output capacitance for any
performance specification.
Figure 1 illustrates the multiplicative effect on output ripple
frequency. The three channel currents (IL1, IL2, and IL3)
combine to form the AC ripple current and the DC load
current. The ripple component has three times the ripple
frequency of each individual channel current. Each PWM
FIGURE 1. PWM AND INDUCTOR-CURRENT WAVEFORMS
FOR 3-PHASE CONVERTER
1
μs/DIV
PWM2, 5V/DIV
PWM1, 5V/DIV
IL2, 7A/DIV
IL1, 7A/DIV
IL1 + IL2 + IL3, 7A/DIV
IL3, 7A/DIV
PWM3, 5V/DIV
ISL6322
ISL6322


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