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ISL6322 Datasheet(PDF) 31 Page - Intersil Corporation

Part No. ISL6322
Description  Four-Phase Buck PWM Controller with Integrated MOSFET Drivers and I2C Interface for Intel VR10, VR11, and AMD Applications
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Maker  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
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ISL6322 Datasheet(HTML) 31 Page - Intersil Corporation

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31
FN6328.0
August 21, 2006
General Design Guide
This section is intended to provide a high-level explanation of
the steps necessary to create a multiphase power converter. It
is assumed that the reader is familiar with many of the basic
skills and techniques referenced below. In addition to this guide,
Intersil provides complete reference designs that include
schematics, bills of materials, and example board layouts for all
common microprocessor applications.
Power Stages
The first step in designing a multiphase converter is to
determine the number of phases. This determination
depends heavily on the cost analysis, which in turn depends
on system constraints that differ from one design to the next.
Principally, the designer will be concerned with whether
components can be mounted on both sides of the circuit
board, whether through-hole components are permitted, the
total board space available for power-supply circuitry, and
the maximum amount of load current. Generally speaking,
the most economical solutions are those in which each
phase handles between 25A and 30A. All surface-mount
designs will tend toward the lower end of this current range.
If through-hole MOSFETs and inductors can be used, higher
per-phase currents are possible. In cases where board
space is the limiting constraint, current can be pushed as
high as 40A per phase, but these designs require heat sinks
and forced air to cool the MOSFETs, inductors and heat-
dissipating surfaces.
MOSFETS
The choice of MOSFETs depends on the current each
MOSFET will be required to conduct, the switching frequency,
the capability of the MOSFETs to dissipate heat, and the
availability and nature of heat sinking and air flow.
LOWER MOSFET POWER CALCULATION
The calculation for power loss in the lower MOSFET is
simple, since virtually all of the loss in the lower MOSFET is
due to current conducted through the channel resistance
(rDS(ON)). In Equation 23, IM is the maximum continuous
output current, IPP is the peak-to-peak inductor current (see
Equation 1), and d is the duty cycle (VOUT/VIN).
TABLE 9. REGISTER RGS2 (ADAPTIVE DEADTIME CONTROL/OVERVOLTAGE PROTECTION/SWITCHING FREQUENCY)
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
ADAPTIVE DEADTIME
CONTROL
OVERVOLTAGE
PROTECTION LEVEL
SWITCHING
FREQUENCY
XX
DT1
DT0
OVP
FS2
FS1
FS0
xx
0
0
0
0
0
0
PHASE DETECT
DEFAULT
NOMINAL
xx
0
0
0
0
0
1
PHASE DETECT
DEFAULT
-15%
xx
0
0
0
0
1
0
PHASE DETECT
DEFAULT
-30%
xx
0
0
0
0
1
1
PHASE DETECT
DEFAULT
+15%
xx
0
0
0
1
0
0
PHASE DETECT
DEFAULT
+30%
xx
0
0
1
0
0
0
PHASE DETECT
ALTERNATE
NOMINAL
xx
0
0
1
0
0
1
PHASE DETECT
ALTERNATE
-15%
xx
0
0
1
0
1
0
PHASE DETECT
ALTERNATE
-30%
xx
0
0
1
0
1
1
PHASE DETECT
ALTERNATE
+15%
xx
0
0
1
1
0
0
PHASE DETECT
ALTERNATE
+30%
xx
0
1
0
0
0
0
LGATE DETECT
DEFAULT
NOMINAL
xx
0
1
0
0
0
1
LGATE DETECT
DEFAULT
-15%
xx
0
1
0
0
1
0
LGATE DETECT
DEFAULT
-30%
xx
0
1
0
0
1
1
LGATE DETECT
DEFAULT
+15%
xx
0
1
0
1
0
0
LGATE DETECT
DEFAULT
+30%
xx
0
1
1
0
0
0
LGATE DETECT
ALTERNATE
NOMINAL
xx
0
1
1
0
0
1
LGATE DETECT
ALTERNATE
-15%
xx
0
1
1
0
1
0
LGATE DETECT
ALTERNATE
-30%
xx
0
1
1
0
1
1
LGATE DETECT
ALTERNATE
+15%
xx
0
1
1
1
0
0
LGATE DETECT
ALTERNATE
+30%
NOTE: It is recommended that frequency shifts occur in 15% increments only.
(EQ. 23)
P
LOW 1
,
r
DS ON
()
I
M
N
------
⎝⎠
⎜⎟
⎛⎞ 2
1d
()
I
LPP
,
2
1d
()
12
-------------------------------------
+
=
ISL6322


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