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SPD6722QCCE Datasheet(PDF) 3 Page - Intel Corporation

Part No. SPD6722QCCE
Description  ISA-to-PC-Card (PCMCIA) Controllers
Download  138 Pages
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Maker  INTEL [Intel Corporation]
Homepage  http://www.intel.com
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SPD6722QCCE Datasheet(HTML) 3 Page - Intel Corporation

 
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Datasheet
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ISA-to-PC-Card (PCMCIA) Controllers — PD6710/’22
Contents
1.0
Product Features........................................................................................................9
2.0
General Conventions ..............................................................................................11
2.1
Numbers and Units.............................................................................................. 11
3.0
Pin Information..........................................................................................................12
3.1
Pin Diagrams....................................................................................................... 13
3.2
Pin Description Conventions ............................................................................... 14
3.3
Pin Descriptions .................................................................................................. 16
3.4
Power-On Configuration Summary .....................................................................25
4.0
Introduction ................................................................................................................27
4.1
System Architecture ............................................................................................ 27
4.1.1
PC Card Basics ...................................................................................... 27
4.1.2
PD67XX Windowing Capabilities ........................................................... 27
4.1.3
PD67XX Functional Blocks .................................................................... 30
4.1.4
Interrupts ................................................................................................ 30
4.1.5
Alternate Functions of Interrupt Pins ...................................................... 31
4.1.6
General-Purpose Strobe Feature ........................................................... 32
4.1.7
Voltage Sense Pins ................................................................................ 32
4.1.8
PD67XX Power Management ................................................................ 32
4.1.9
Socket Power Management Features .................................................... 34
4.1.10 Write FIFO.............................................................................................. 35
4.1.11 Bus Sizing .............................................................................................. 35
4.1.12 Programmable PC Card Timing ............................................................. 36
4.1.13 DMA Mode Operation for the PD6722 ................................................... 36
4.1.14 Selective Data Drive for I/O Windows .................................................... 36
4.2
Host Access to Registers .................................................................................... 36
4.3
Power-On Setup.................................................................................................. 38
5.0
Register Description Conventions....................................................................39
6.0
Operation Registers ................................................................................................41
6.1
Index.................................................................................................................... 41
6.2
Data..................................................................................................................... 44
7.0
Chip Control Registers ..........................................................................................46
7.1
Chip Revision ......................................................................................................46
7.2
Interface Status ................................................................................................... 47
7.3
Power Control......................................................................................................48
7.4
Interrupt and General Control.............................................................................. 51
7.5
Card Status Change............................................................................................ 52
7.6
Management Interrupt Configuration................................................................... 54
7.7
Mapping Enable .................................................................................................. 55
8.0
I/O Window Mapping Registers ..........................................................................58
8.1
I/O Window Control ............................................................................................. 58
8.2
System I/O Map 0–1 Start Address Low ............................................................. 59


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