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LT1977 Datasheet(PDF) 3 Page - Linear Technology |
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LT1977 Datasheet(HTML) 3 Page - Linear Technology |
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3 / 24 page  LT1977 3 1977f ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VIN = 12V, SHDN = 12V, BIAS = 5V, FB/PGFB = 1.25V, CSS/SYNC = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Switch On Resistance (Note 9) ● 0.2 0.4 Ω Switching Frequency ● 425 500 575 kHz Maximum Duty Cycle 86 92 % Minimum SYNC Amplitude 1.5 2.0 V SYNC Frequency Range 575 700 kHz SYNC Input Impedance 85 kΩ ICSS CSS Current Threshold (Note 10) 7 13 20 µA IPGFB PGFB Input Current 25 100 nA VPGFB PGFB Voltage Threshold (Note 11) ● 88 90 92 % ICT CT Source Current (Note 11) 2 3.6 5.5 µA CT Sink Current (Note 11) 1 2 mA VCT CT Voltage Threshold (Note 11) 1.16 1.2 1.26 V PG Leakage (Note 11) VPG = 12V 0.1 1 µA PG Sink Current (Note 11) PGFB = 1V, PG = 400mV 100 200 µA Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LT1977EFE is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT1977IFE is guaranteed and tested over the full –40°C to 125°C operating junction temperature range. Note 3: Minimum input voltage is defined as the voltage where switching starts. Actual minimum input voltage to maintain a regulated output will depend upon output voltage and load current. See Applications Information. Note 4: Supply input current is the quiescent current drawn by the input pin. Its typical value depends on the voltage on the BIAS pin and operating state of the LT1977. With the BIAS pin at 0V, all of the quiescent current required to operate the LT1977 will be provided by the VIN pin. With the BIAS voltage above its minimum input voltage, a portion of the total quiescent current will be supplied by the BIAS pin. Supply sleep current is defined as the quiescent current during the “sleep” portion of Burst Mode operation. See Applications Information for determining application supply currents. Note 5: Minimum BIAS voltage is the voltage on the BIAS pin when IBIAS is sourced into the pin. Note 6: This is the minimum voltage across the boost capacitor needed to guarantee full saturation of the internal power switch. Note 7: Boost current is the current flowing into the BOOST pin with the pin held 3.3V above input voltage. It flows only during switch on time. Note 8: Gain is measured with a VC swing from 1.15V to 750mV. Note 9: Switch on resistance is calculated by dividing VIN to SW voltage by the forced current (1.5A). See Typical Performance Characteristics for the graph of switch voltage at other currents. Note 10: The CSS threshold is defined as the value of current sourced into the CSS pin which results in an increase in sink current from the VC pin. See the Soft-Start section in Applications Information. Note 11: The PGFB threshold is defined as the percentage of VREF voltage which causes the current source output of the CT pin to change from sinking (below threshold) to sourcing current (above threshold). When sourcing current, the voltage on the CT pin rises until it is clamped internally. When the clamp is activated, the output of the PG pin will be set to a high impedance state. When the CT clamp is inactive the PG pin will be set active low with a current sink capability of 200µA. |
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