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CD54AC109 Datasheet(PDF) 3 Page - Texas Instruments

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Part No. CD54AC109
Description  Dual j-k Flip-Flop with Set and Reset
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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CD54AC109 Datasheet(HTML) 3 Page - Texas Instruments

   
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CD54AC109, CD74AC109
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SCHS326 – JANUARY 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC
–0.5 V to 6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 V or VI > VCC) (see Note 1)
±20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 V or VO > VCC) (see Note 1)
±50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO > 0 V or VO < VCC)
±50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND
±100 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θJA (see Note 2): E package
67
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M package
73
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
–65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
TA = 25°C
–55
°C to
125
°C
–40
°C to
85
°C
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
VCC
Supply voltage
1.5
5.5
1.5
5.5
1.5
5.5
V
VCC = 1.5 V
1.2
1.2
1.2
VIH
High-level input voltage
VCC = 3 V
2.1
2.1
2.1
V
VCC = 5.5 V
3.85
3.85
3.85
VCC = 1.5 V
0.3
0.3
0.3
VIL
Low-level input voltage
VCC = 3 V
0.9
0.9
0.9
V
VCC = 5.5 V
1.65
1.65
1.65
VI
Input voltage
0
VCC
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
0
VCC
V
IOH
High-level output current
VCC = 4.5 V to 5.5 V
–24
–24
–24
mA
IOL
Low-level output current
VCC = 4.5 V to 5.5 V
24
24
24
mA
∆t/∆v
Input transition rise or fall rate
VCC = 1.5 V to 3 V
50
50
50
ns/V
∆t/∆v
Input transition rise or fall rate
VCC = 3.6 V to 5.5 V
20
20
20
ns/V
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.


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