1

PS8133A

01/31/00

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PI74ALVCH16501

18-Bit Universal Bus Transceiver

With 3-State Outputs

Logic Block Diagram

Product Description

Pericom Semiconductor’s PI74ALVCH series of logic circuits are

produced in the Company’s advanced 0.5 micron CMOS technology,

achieving industry leading speed.

The 18-bit PI74ALVCH16501 univeral bus transceiver is designed

Data flow in each direction is controlled by Output Enable (OEAB

and OEBA), Latched Enable (LEAB and LEBA), and CLOCK

(CLKAB and CLKBA) inputs. For A-to-B data flow, the device

operates in the transparent mode when LEAB is HIGH. When LEAB

is LOW, the A data is latched if CLKAB is held at a high or low logic

level. If LEAB is LOW, the A-bus is stored in the latch/flip-flop on

the low-to-high transition of CLKAB. When OEAB is HIGH, the

outputs are active. When OEAB is LOW, the outputs are in the high-

impedance state.

Data flow for B to A is similar to that of A to B but uses OEBA, LEBA,

and CLKBA. The Output Enables are complementary (OEAB is

active HIGH and OEBA is active LOW).

To ensure the high-impedance state during power up or power

OEAB should be tied to GND through a pulldown resistor; the

minimum value of the resistor is determined by the current-sinking

capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating

data inputs at a valid logic level.

Product Features

• PI74ALVCH16501 is designed for low voltage operation

• Hysteresis on all inputs

• Bus Hold retains last active bus state during 3-STATE

eliminating the need for external pullup resistors

• Industrial operation at –40°C to +85°C

• Packages available:

– 48-pin 240 mil wide plastic TSSOP (A)

– 48-pin 300 mil wide plastic SSOP (V)