Electronic Components Datasheet Search
  English  ▼

Delete All


Preview PDF Download HTML

U2532B Datasheet(PDF) 3 Page - TEMIC Semiconductors

Part No. U2532B
Description  IR Transmitter and Receiver
Download  10 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  TEMIC [TEMIC Semiconductors]
Homepage  http://www.temic.de
Logo TEMIC - TEMIC Semiconductors

U2532B Datasheet(HTML) 3 Page - TEMIC Semiconductors

  U2532B Datasheet HTML 1Page - TEMIC Semiconductors U2532B Datasheet HTML 2Page - TEMIC Semiconductors U2532B Datasheet HTML 3Page - TEMIC Semiconductors U2532B Datasheet HTML 4Page - TEMIC Semiconductors U2532B Datasheet HTML 5Page - TEMIC Semiconductors U2532B Datasheet HTML 6Page - TEMIC Semiconductors U2532B Datasheet HTML 7Page - TEMIC Semiconductors U2532B Datasheet HTML 8Page - TEMIC Semiconductors U2532B Datasheet HTML 9Page - TEMIC Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 10 page
background image
Preliminary Information
TELEFUNKEN Semiconductors
Rev. A1, 27-Sep-96
3 (10)
Functionality of the Various Circuit Blocks
Transimpedance Amplifier (TIA)
The input stage provides the necessary bias voltage for the
photodiode and ensures decoupling of the useful signal.
This involves processing the dc and ac portions in sepa-
rate parts of the circuit, BIAS (Bias voltage) and TIA. The
BIAS circuit separates the dc part (sunlight, incandescent
light) from the input signal. The ac portion of the input
current is fed to an inverting amplifier with a sufficiently
low input impedance (TIA). The TIA prevents the signal
slopes to be negatively affected by the junction capaci-
tance of the photodiode.
Controlled Gain Amplifier (CGA)
The CGA consists of two differential amplifiers. The total
gain is 17 in the high sense mode (Sensitivity Control In-
put “High”) and can be reduced to 8 if the Sensitivity
Control Input is set to “Low”. In the low sense mode a
BER of 1E-9 is guaranteed. In the high sense mode
eventually generated output pulses must be suppressed by
software handling. The lower and upper cut-off frequen-
cies of the amplifier are 25 kHz and 900 kHz
respectively. Additionally the overall gain can be
attenuated by 30 dB in 2 dB steps. The attenuation is digi-
tally controlled by the AGC (Automatic Gain Control)
Comparator (COMP)
The comparator compares the output signal of the CGA
to an internal threshold voltage. The output of that
comparator is directly connected to an collector output
stage. An internal pull up resistor of 20 k
W is provided.
Automatic Gain Control (AGC)
The AGC adjusts the sensitivity of the receiver according
to the strength of the incoming signals. When the input
signal increases, the amplification of the CGA is reduced
to a value where a BER < 1E-9 is still guaranteed, but sig-
nals from disturbers can be effectively suppressed. With
this feature a proper data transmission can be maintained
also in the presence of energy saving lamps and ceiling
lamps that are common in offices. The dynamic range of
the AGC is max. 30 dB. This provides the ability to sup-
press also strong disturbers. As the AGC acts when the
input signal increases, the transmission distance is re-
duced if disturbances have to be suppressed. The AGC is
digitally controlled and therefore not dependent on any
time constant. The amplification of the CGA is set at ev-
ery input pulse or input burst for ASK-modulation and is
maintained until the next input signal is detected. The sig-
nal strength determines whether to reduce, increase or
maintain the gain. If no input signal is detected in 18 ms,
the AGC considers the data transmission to be finished
and increases the gain by a 2 dB step. Within every 18 ms
the gain is increased by an additional 2 dB step, until the
maximum gain of the CGA is reached. If a “High” signal
is applied at the reset (Pin 4), the AGC is set to maximum
sensitivity. Incoming signals don‘t influence the AGC.
Under this biasing condition it is possible to get maximum
transmission distance also in the presence of a known
strong disturber, if of course the signals of the disturber
can be succesfully suppressed by software handling in the
microprocessor. During “Power-On” the AGC is set to
maximum sensitivity. The gain of the AGC is maintained
while the transceiver is transmitting.
IRED Driver (DRV)
The IRED driver DRV is also monolithically integrated
on the transceiver chip providing a high impedance input
to drive a fast IR emitter diode. The “active high” input
signal drives the output stage. This stage mainly consists
of an input amplifier and an open collector NPN transistor
that is saturation controlled. The output transistor is capa-
ble of driving a lood current up to 1 A.

Html Pages

1  2  3  4  5  6  7  8  9  10 

Datasheet Download

Go To PDF Page

Link URL

Privacy Policy
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com

Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn