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LT1054MJ8 Datasheet(PDF) 8 Page - Linear Technology |
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LT1054MJ8 Datasheet(HTML) 8 Page - Linear Technology |
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8 / 16 page  8 LT1054/LT1054L 1054lfe APPLICATIONS INFORMATION voltage. For the basic configuration, |VOUT| referred to the ground pin of the LT1054 must be less than the total of the supply voltage minus the voltage loss due to the switches. The voltage loss versus output current due to the switches can be found in Typical Performance Characteristics. Other configurations such as the negative doubler can provide higher output voltages at reduced output currents (see Typical Applications). Capacitor Selection For unregulated circuits the nominal values of CIN and COUT should be equal. For regulated circuits see the section on Regulation. While the exact values of CIN and COUT are noncritical, good quality, low ESR capacitors such as solid tantalum are necessary to minimize voltage losses at high currents. For CIN the effect of the ESR of the capacitor will be multiplied by four due to the fact that switch currents are approximately two times higher than output current and losses will occur on both the charge and discharge cycle. This means that using a capacitor with 1 Ω of ESR for CIN will have the same effect as increasing the output imped- ance of the LT1054 by 4 Ω. This represents a significant increase in the voltage losses. For COUT the affect of ESR is less dramatic. COUT is alternately charged and discharged at a current approximately equal to the output current and the ESR of the capacitor will cause a step function to occur in the output ripple at the switch transitions. This step function will degrade the output regulation for changes in output load current and should be avoided. Realizing that large value tantalum capacitors can be expensive, a tech- nique that can be used is to parallel a smaller tantalum capacitor with a large aluminum electrolytic capacitor to gain both low ESR and reasonable cost. Where physical size is a concern some of the newer chip type surface mount tantalum capacitors can be used. These capacitors are normally rated at working voltages in the 10V to 20V range and exhibit very low ESR (in the range of 0.1 Ω). Output Ripple The peak-to-peak output ripple is determined by the value of the output capacitor and the output current. Peak-to- peak output ripple may be approximated by the formula: dV = IOUT 2fCOUT R4 RESTART SHUTDOWN C1 R2 CIN 10 µF TANTALUM COUT 100 µF TANTALUM VOUT LT1054 • F05 VIN R1 2.2 µF R3 R2 R1 = ≈ + 1 WHERE VREF = 2.5V NOMINAL *CHOOSE THE CLOSEST 1% VALUE FOR EXAMPLE: TO GET VOUT = –5V REFERRED TO THE GROUND PIN OF THE LT1054, CHOOSE R1 = 20k, THEN |VOUT| ) ) VREF 2 – 40mV R2 = 20k = 102.6k* + 1 |–5V| ) ) 2.5V 2 – 40mV ) ) +1 |VOUT| 1.21V LT1054 FB/SHDN CAP+ GND CAP – V+ OSC VREF VOUT + Figure 5 20k or greater because the reference output current is limited to ≈100µA.R2shouldbechosentobeintherange of 100k to 300k. For optimum results the ratio of CIN/COUT is recommended to be 1/10. C1, required for good load regulation at light load currents, should be 0.002 µF for all output voltages. A new die layout was required to fit into the physical dimensions of the S8 package. Although the new die of the LT1054CS8 will meet all the specifications of the existing LT1054 data sheet, subtle differences in the layout of the new die require consideration in some application cir- cuits. In regulating mode circuits using the 1054CS8 the nominal values of the capacitors, CIN and COUT, must be approximately equal for proper operation at elevated junction temperatures. This is different from the earlier part. Mismatches within normal production tolerances for the capacitors are acceptable. Making the nominal capacitor values equal will ensure proper operation at elevated junction temperatures at the cost of a small degradation in the transient response of regulator cir- cuits. For unregulated circuits the values of CIN and COUT are normally equal for all packages. For S8 applications assistance in unusual applications circuits, please consult the factory. It can be seen from the circuit block diagram that the maximum regulated output voltage is limited by the supply |
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