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TA7S04 Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers

Part No. TA7S04
Description  Triscend A7S Configurable System-on-Chip Platform
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Maker  ETC1 [List of Unclassifed Manufacturers]
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TA7S04 Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers

 
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®
Triscend A7S Configurable
System-on-Chip Platform
August, 2002
(Version 1.10)
Product Description
© 2000-2002 by Triscend Corporation. All rights reserved.
TCH305-0001-002
Patents Pending.
! Industry’s first complete 32-bit Configurable
System-on-Chip (CSoC)
• High-performance, low-power consumption,
32-bit RISC processor (ARM7TDMI™)
• 8Kbyte mixed instruction/data cache
• 16Kbyte internal scratchpad RAM
• Next-generation embedded programmable
logic architecture (up to 25,600 ASIC gates)
• High-performance dedicated internal bus
(up to 455Mbytes per second at 60 MHz)
• External memory interface supporting
Flash, EEPROM, SRAM, and SDRAM
• Advanced real-time, in-system debugging
capability
• Stand-alone operation from a single
external memory (code + initialization)
• 2.5-volt core with 3.3- or 2.5-volt I/Os
• Four independent high-performance DMA
channels
! High-performance, 32-bit
ARM7TDMI RISC Processor
• Popular, industry-standard 32-
bit RISC processor
• Binary and source code
compatible with other ARM7/ARM7TDMI
variants
• Widespread C/C++ compiler, source-level
debugger, and RTOS support
• Superior code density using the Thumb®
instruction set
• 54 MIPS (Dhrystone 2.1) at 60 MHz
• Low latency, real-time interrupt response
• Fast hardware multiplier
• 32-bit register bank and ALU
• 32-bit addressing ― 4Gbyte linear address
• 32-bit barrel shifter
• EmbeddedICE™ on-chip debugger
Configurable
System Logic
(CSL)
matrix
PIO
PIO
PIO
PIO
PIO
CSI Bus
Arbiter
Power Control
Selector
Selector
Clock Synthesizer
Power-On Reset
To external memory
Configurable System
Interconnect (CSI) bus
Configurable System
Interconnect socket
Selector
Selector
Selector
Four-channel
DMA Controller
JTAG Interface
Hardware
Breakpoint Unit
Memory Interface
Unit
SDRAM Controller
Static/Flash Interface
Selector
PIO
PIO
PIO
Cache
* 8K Bytes
* 4-way Set Associative
* Protection Unit
CSI Bridge
16KBytes
ScratchPad
SRAM
or
Trace Buffer
ARM7TDMI
16-bit
Timer
32-bit
Watchdog Timer
16-input
Interrupt Controller
16-bit
Timer
UART
with FIFO
UART
with FIFO
Standard Peripherals
Figure 1. Block diagram of the Triscend A7S Configurable System-on-Chip (CSoC).
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