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TPA5051 Datasheet(PDF) 2 Page - Texas Instruments

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Part No. TPA5051
Description  FOUR CHANNEL DIGITAL AUDIO LIP-SYNC DELAY WITH I2C CONTROL
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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TPA5051 Datasheet(HTML) 2 Page - Texas Instruments

 
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PIN DESCRIPTIONS
ADD1
LRCLK1
SCL
DATA_OUT2
ADD0
ADD2
DATA1
11
9
10
12
3
1
2
4
SDA
RSA (QFN)PACKAGE
(TOP VIEW)
TPA5051
SLOS497A – JUNE 2006 – REVISED JULY 2006
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
ADD0
10
I
I2C address select pin – LSB. 5V tolerant input.
ADD1
11
I
I2C address select pin. 5V tolerant input.
ADD2
12
I
I2C address select pin – MSB. 5V tolerant input.
BCLK1(1)
16
I
Audio data bit clock input for serial input 1. 5V tolerant input.
BCLK2(1)
8
I
Audio data bit clock input for serial input 2. 5V tolerant input.
DATA1
2
I
Audio serial data input for serial input 1. 5V tolerant input.
DATA2
6
I
Audio serial data input for serial input 2. 5V tolerant input.
DATA_OUT1
15
O
Delayed audio serial data output for channel 1.
DATA_OUT2
9
O
Delayed audio serial data output for channel 2.
GND
5, 14
P
Ground – All ground terminals must be tied to GND for proper operation
LRCLK1(1)
1
I
Channel 1 left and right serial audio sampling rate clock (fs). 5V tolerant input.
LRCLK2(1)
7
I
Channel 2 left and right serial audio sampling rate clock (fs). 5V tolerant input.
SCL
3
I
I2C communication bus clock input. 5V tolerant input.
SDA
4
I/O
I2C communication bus data input. 5V tolerant input.
VDD
13
P
Power supply interface.
Connect to ground. Must be soldered down in all applications to properly secure device on the
Thermal Pad
-
PCB.
(1)
Left and right channels may use different BCLK frequencies as well as different LRCLK (fs) frequencies.
2
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