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M37151 Datasheet(PDF) 30 Page - Renesas Technology Corp

Part No. M37151
Description  SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M37151 Datasheet(HTML) 30 Page - Renesas Technology Corp

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP
29
Rev. 1.0
Function
In conformity with Philips I2C-BUS
standard:
10-bit addressing format
7-bit addressing format
High-speed clock mode
Standard clock mode
In conformity with Philips I2C-BUS
standard:
Master transmission
Master reception
Slave transmission
Slave reception
16.1 kHz to 400 kHz (
φ = at 4 MHz)
Table 8.6.1 Multi-master I2C-BUS Interface Functions
Item
Format
Communication mode
SCL clock frequency
φ : System clock = f(XIN)/2
Note : We are not responsible for any third party’s infringement of patent rights
or other rights attributable to the use of the control function (bits 6 and 7
of the I2C control register at address 00F916) for connections between
the I2C-BUS interface and ports (SCL1, SCL2, SDA1, SDA2).
8.6 MULTI-MASTER I2C-BUS INTERFACE
The multi-master I2C-BUS interface is a serial communications cir-
cuit, conforming to the Philips I2C-BUS data transfer format. This
interface, offering both arbitration lost detection and synchronous
function, is useful for multi-master serial communications.
Figure 8.6.1 shows a block diagram of the multi-master I2C-BUS in-
terface and Table 8.6.1 shows multi-master I2C-BUS interface func-
tions.
This multi-master I2C-BUS interface consists of the address register,
the data shift register, the clock control register, the control register,
the status register and other control circuits.
Fig. 8.6.1 Block Diagram of Multi-master I2C-BUS Interface
I2C address register (S0D)
b7
b0
SAD6 SAD5 SAD4 SAD3 SAD2 SAD1 SAD0 RBW
Noise
elimination
circuit
Serial
data
(SDA)
Address comparator
b7
I2C data shift register
b0
Data
control
circuit
I2C clock control register (S2)
System clock
(
φ)
Interrupt
generating
circuit
Interrupt
request signal
(IICIRQ)
b7
MST TRX BB
PIN
AL AAS AD0 LRB
b0
I2C status
register
(S1)
b7
b0
BSEL1 BSEL0 10BIT
SAD
ALS
BC2 BC1 BC0
I2C control register (S1D)
I2C control register (S1D)
Bit counter
BB
circuit
Clock
control
circuit
Noise
elimination
circuit
Serial
clock
(SCL)
b7
b0
ACK
ACK
BIT
FAST
MODE CCR4 CCR3 CCR2 CCR1 CCR0
Internal data bus
Clock division
S0
AL
circuit
ESO


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