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C9812 Datasheet(PDF) 1 Page - Cypress Semiconductor

Part No. C9812
Description  Low EMI Clock Generator for Intel 810E Chipset Systems
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Maker  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
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C9812 Datasheet(HTML) 1 Page - Cypress Semiconductor

 
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Low EMI Clock Generator for Intel
810E Chipset Systems
Cypress Semiconductor Corporation
525 Los Coches St.
Document#: 38-07053 Rev. **
05/03/01
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
Page 1 of 18
http://www.cypress.com
APPROVED PRODUCT
C9812
Product Features
Intel’s 810E clock solution
3 copies of CPU Clock (CPU[0:1] and CPU_ITP)
9 copies of SDRAM Clock (SDRAM[0:7] and DCLK)
8 copies of PCI Clock
2 copies of 3V66 Clock
2 copies of APIC Clock, synchronous to PCI Clock
1 REF Clock
1 USB Clock (Non SSC)
1 DOT Clock (Non SSC)
Power Down Feature
Spread Spectrum Support
SMBUS Support for turning off unused clocks
Block Diagram
Fig.1
Frequency Table (MHz)
SEL2
SEL1
SEL0
CPU
SDRAM
PCI
X
0
0
Tristate
Tristate
Tristate
X
0
1
Test mode (see table2)
0
1
0
66.6
100
33.3
0
1
1
100
100
33.3
1
1
X
133.3
100
33.3
Table 1
Note: The following clocks remain fixed frequencies
except in Test Mode.
3V66=66.6MHz, USB/DOT=48MHz, REF=14.318MHz
and IOAPIC=33.3MHz.
Pin Configuration
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
XIN
VDD
SEL1
XOUT
VSS
VSS
3V660
3V661
VDD
PCI0_ICH
PCI1
PCI2
VSS
PCI4
VSS
VDD
PCI3
PCI5
PCI6
VDD
VDDA
VSSA
VSS
VDD
DCLK
VSS
SDRAM7
SDRAM6
SDRAM5
VDDS
VSS
SDRAM2
VDDS
SDRAM0
VSS
CPU2_ITP
CPU1
SDRAM4
SDRAM3
SDRAM1
VSS
VDDC
CPU0
VDDI
IOAPIC1
IOAPIC0
VSS
PCI7
C
9
8
1
2
25
26
27
SEL2/REF
USB
DOT
28
VDD
SEL0
SDATA
SCLK
PD#
49
50
51
52
53
54
55
56
VDDC
VDDS
VDD
VDD
VDDI
VDD
VDD
VDD
PLL1
Rin
i2c-clk
i2c-data
ioapic
s1
pwr_dwn#
s0
cpu
sdram
66m
pci
s2
PLL2
Rin
48
PD#
i2c-clk
i2c-data
300K
36pF
36pF
3
9
2
8
2
1
1
1
XIN
XO U T
CPU(0:2)
SDRA M(0:7), DC LK
3V66(0:1)
PC I(0:7)
IO AP IC (0:1)
SDATA
SCLK
PD#
SEL0
SEL1
DOT
USB
REF / SE L2
VDD
VDD


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