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BGY284 Datasheet(PDF) 5 Page - NXP Semiconductors

Part No. BGY284
Description  Power amplifier with integrated control loop for GSM850, EGSM900, DCS1800 & PCS1900
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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BGY284 Datasheet(HTML) 5 Page - NXP Semiconductors

 
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2003 Aug 20
5
Philips Semiconductors
Preliminary specification
power amplifier with integrated control loop for
GSM850, EGSM900, DCS1800 & PCS1900
BGY284
FUNCTIONAL DESCRIPTION
Operating conditions
The BGY284 is designed to meet the 3GPP TS 45.005 technical specification for the European Telecommunication
Standards Institute (ETSI).
Power amplifier
The low band (GSM850 and EGSM900) and the high band (DCS1800 and PCS1900) power amplifiers both consist of 3
cascaded gain stages. Input and output matching as well as harmonic filters are integrated in the module. The output
power is controlled by means of an internal control signal (generated in the power controller block) that is used to adapt
the biasing of the 3 stages of an amplifier.
For every line-up the power amplifier block generates a detected output power signal, that is an input to the power control
block.
Control logic
In the control logic block the various signals are generated to control the complete BGY284 out of VTXon and Vband, as
indicated in the mode control table. The VSTAB is used as supply for the control logic. When VSTAB = 0 V the BGY284 is
in idle mode and the battery current consumption is almost zero.
The VTXon signal “HIGH” enables the power control block. When Vband signal is “LOW” the low band
(GSM850/EGSM900) line-up is enabled, when the Vband signal is “HIGH” the high band (DCS1800/PCS1900) channel
is enabled.
On both VTXon and Vband inputs there are pull down resistors of approximately 1 MΩ.
Power controller
Main inputs to the power controller block are the VDAC and the internal generated detected output power signals from the
power amplifier block.
The VDAC signal is the reference voltage for the requested output power level, and usualy is generated by an external
digital analog converter.
The VDAC signal is buffered and compared to the detected output power signal. The error signal is then further amplified
by the integrator.
Dependent on the Vband signal one of the integrators are selected. The output of the selected integrator is the internal
control signal that sets the biasing circuits of the selected channel.
Mode control
MODE
Mode description
VSTAB
(V)
VTXon
Vband
VDAC
(V)
Idle
complete PA off, minimal leakage current
0
0
0
<0.15
Standby
control logic functioning, PA off
2.6...3
0
logic 1 or logic 0
<0.15
LB TX
low band transmit mode
2.6...3
1
0
<2.5
HB TX
high band transmit mode
2.6...3
1
1
<2.5


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