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ADS8504 Datasheet(PDF) 5 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation. Click here to check the latest version.
Part No. ADS8504
Description  12-BIT 250-KSPS SAMPLING CMOS ANALOG-TO-DIGITAL CONVERTER
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Maker  BURR-BROWN [Burr-Brown (TI)]
Homepage  http://www.burr-brown.com
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ADS8504 Datasheet(HTML) 5 Page - Burr-Brown (TI)

 
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ADS8504
SLAS434 – JUNE 2005
DEVICE INFORMATION (continued)
Terminal Functions
TERMINAL
DIGITAL
DESCRIPTION
I/O
NAME
DW NO.
AGND1
2
Analog ground. Used internally as ground reference point.
AGND2
5
Analog ground.
BUSY
26
O
At the start of a conversion, BUSY goes low and stays low until the conversion is
completed and the digital outputs have been updated.
BYTE
23
I
Selects 8 most significant bits (low) or 8 least significant bits (high).
CAP
4
Reference buffer capacitor. 2.2-µF tantalum capacitor to ground.
CS
25
I
Internally ORed with R/C. If R/C low, a falling edge on CS initiates a new conversion.
DGND
14
Digital ground.
D11 (MSB)
6
O
Data bit 11. Most significant bit (MSB) of conversion results. Hi-Z state when CS is
high, or when R/C is low.
D10
7
O
Data bit 10. Hi-Z state when CS is high, or when R/C is low.
D9
8
O
Data bit 9. Hi-Z state when CS is high, or when R/C is low.
D8
9
O
Data bit 8. Hi-Z state when CS is high, or when R/C is low.
D7
10
O
Data bit 7. Hi-Z state when CS is high, or when R/C is low.
D6
11
O
Data bit 6. Hi-Z state when CS is high, or when R/C is low.
D5
12
O
Data bit 5. Hi-Z state when CS is high, or when R/C is low.
D4
13
O
Data bit 4. Hi-Z state when CS is high, or when R/C is low.
D3
15
O
Data bit 3. Hi-Z state when CS is high, or when R/C is low.
D2
16
O
Data bit 2. Hi-Z state when CS is high, or when R/C is low.
D1
17
O
Data bit 1. Hi-Z state when CS is high, or when R/C is low.
D0 (LSB)
18
O
Data bit 0. Least significant bit (LSB) of conversion results. Hi-Z state when CS is high,
or when R/C is low.
DZ
19
O
Low when CS low, R/C high. Hi-Z state when CS is high, or when R/C is low.
DZ
20
O
Low when CS low, R/C high. Hi-Z state when CS is high, or when R/C is low.
DZ
21
O
Low when CS low, R/C high. Hi-Z state when CS is high, or when R/C is low.
DZ
22
O
Low when CS low, R/C high. Hi-Z state when CS is high, or when R/C is low.
R/C
24
I
With CS low and BUSY high, a falling edge on R/C initiates a new conversion. With CS
low, a rising edge on R/C enables the parallel output.
REF
3
Reference input/output. 2.2-µF tantalum capacitor to ground.
VANA
27
Analog supply input. Nominally +5 V. Decouple to ground with 0.1-µF ceramic and
10-µF tantalum capacitors.
VDIG
28
Digital supply input. Nominally +5 V. Connect directly to pin 27. Must be
≤ V
ANA.
VIN
1
Analog input.
5


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