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AD73411 Datasheet(PDF) 5 Page - Analog Devices

Part No. AD73411
Description  Low-Power Analog Front End with DSP Microcomputer
Download  36 Pages
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD73411 Datasheet(HTML) 5 Page - Analog Devices

 
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REV. 0
–5–
AD73411
POWER CONSUMPTION
Parameter
Typ
Max
SE
MCLK On
Test Conditions
AFE SECTION
ADC Only On
7
8
1
Yes
REFOUT Disabled
ADC and DAC On
11
12.5
1
Yes
REFOUT Disabled
REFCAP Only On
0.65
1.00
0
No
REFOUT Disabled
REFCAP and
2.7
3.8
0
No
REFOUT Only On
All AFE Sections Off
0.6
0.75
0
Yes
MCLK Active Levels Equal to 0 V and DVDD
All AFE Sections Off
5
µA
30
µA
0
No
Digital Inputs Static and Equal to 0 V or DVDD
DSP SECTION
Idle Mode
6.4
Dynamic
43
NOTES
The above values are in mA and are typical values unless otherwise noted.
Specifications subject to change without notice.
TIMING CHARACTERISTICS–AFE SECTION
Parameter
Limit
Unit
Description
Clock Signals
See Figure 1
t1
61
ns min
16.384 MHz AMCLK Period
t2
24.4
ns min
MCLK Width High
t3
24.4
ns min
MCLK Width Low
Serial Port
See Figures ? and ?
t4
t1
ns min
SCLK Period (SCLK = AMCLK)
t5
0.4
× t
1
ns min
SCLK Width High
t6
0.4
× t1
ns min
SCLK Width Low
t7
20
ns min
SDI/SDIFS Setup Before SCLK Low
t8
0
ns min
SDI/SDIFS Hold After SCLK Low
t9
10
ns max
SDOFS Delay from SCLK High
t10
10
ns min
SDOFS Hold After SCLK High
t11
10
ns min
SDO Hold After SCLK High
t12
10
ns max
SDO Delay from SCLK High
t13
30
ns max
SCLK Delay from MCLK
Specifications subject to change without notice.


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