AD9923A datasheet(70/88 Pages) AD

Part #	AD9923A

Description	CCD Signal Processor with V-Driver and Precision Timing??Generator

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Manufacturer	AD [Analog Devices]

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70 / 88 page

AD9923A

Rev. 0 | Page 70 of 88

Address

(Hex)

Data

Bits

Default

Value

Update

Type

Name

Description

01

[0]

0

SCK

DOUTDISABLE

0: data outputs are driven.

1: data outputs are three-stated.

[1]

0

DOUTLATCH

0: latch data outputs using DOUT PHASE register setting.

1: output latch is transparent.

[2]

0

GRAYEN

0: straight binary encoding of ADC digital output data.

1: enable gray encoding of ADC digital output data.

[3]

1

TEST

Set to 1.

04

[1:0]

1

VD

CDSGAIN

CDS gain setting.

0: −3 dB.

1: 0 dB.

2: +3 dB.

3: +6 dB.

05

[9:0]

F

VD

VGAGAIN

VGA gain. 6 dB to 42 dB (0.035 dB per step).

06

[9:0]

1EC

VD

CLAMPLEVEL

Optical black clamp level. 0 LSB to 256 LSB (0.25 LSB per step).

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