lows the ()
1
- -
e
t
shape of the attack curve. The
transformation from the linear to the log world
steepens the apparent attack shape.
The time constant,
t, also determines the amount
of ripple (at frequency 2fin) in the output for any
given input frequency, fin. Larger values of t reduce
ripple at the expense of longer attack and release
times. For fin >>
1
4
pt , the ripple voltage at the out-
put is given by: VR
V
f
T
in
»
42
pt , where VR is the rms
ripple voltage.
Taking the Square Root
The square root portion of the Root-Mean Square
is implied by the constant of proportionality for
the output voltage: it is not computed explicitly.
This is because, in the log representation, taking
the square root is equivalent to division by two.
The voltage at pin 6 is proportional to the mean of
the square at approximately 3 mV/dB, and propor-
tional to the square root of the mean of the square
at approximately 6 mV/dB.
Output Buffering and Level Shifting
The voltage at pin 6 is buffered by OA3, and level
shifted down by the bias voltage V3. Level shifting
is required so that the output voltage will be zero
when the rms input current reaches a predeter-
mined value, Iin0. This current is often called level
match, and represents the 0 dB reference of the
circuit.
The various level shifts throughout the 2252 are as
follows: V2 represents one diode drop, so the volt-
age at the emitter of Q4 is +1VBE. The output of
OA2 is two diode drops higher than this, or
+3VBE. Q6 will subtract one diode drop from the
output of OA2, so the voltage at pin 6 will be
+2VBE. Finally, V3 represents two diode drops,
setting the voltage at pin 7 to 0 V.
Of course, the actual value of all these level shifts
is dependent on the currents through the transis-
tors responsible for each VBE. These currents, in
turn, are dependent on the bias programming cur-
rent in pin 2 (IBIAS) and the timing current pulled
from pin 6 (IT). This dependence may be given as
follows:
Iin
II
BIAS T
0
29
=
.
,
where Iin0 is the input current
causing 0 V output, IT is the current in pin 6, and
IBIAS is the current in pin 2. The factor 2.9 derives
from the geometry of the transistors involved.
Figure 6 plots output voltage versus input level for
a 2252 in its recommended circuit configuration
(Figure 4). In this plot, 0 dBr
» 43 mV. Figure 7
plots output voltage for several different con-
stant-amplitude frequency sweeps for the same cir-
cuit. The vertical divisions are 60 mV apart,
representing approximately 10 dB increments. Full
audio bandwidth is maintained over a 60 dB dy-
namic range.
Current Programming
All the internal current sources in the 2252 are
slaved to the current in pin 2, IBIAS. As mentioned
above, the choice of this current affects Iin0.IBIAS
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com
600032 Rev 01
Page 5
Figure 6. 2252 DC Output Vs. AC Input Level
Figure 7. 2252 DC Output Vs. Frequency at
Various Levels
Figure 5. Tone Burst Response
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