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PCA8575PW Datasheet(PDF) 6 Page - NXP Semiconductors |
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PCA8575PW Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 30 page  PCA8575_1 © NXP B.V. 2006. All rights reserved. Objective data sheet Rev. 01 — 30 November 2006 6 of 30 NXP Semiconductors PCA8575 Remote 16-bit I/O expander for I2C-bus with interrupt 7. Functional description Refer to Figure 1 “Block diagram of PCA8575”. 7.1 Device address Following a START condition, the bus master must send the address of the slave it is accessing and the operation it wants to perform (read or write). The address of the PCA8575 is shown in Figure 9. Slave address pins AD2, AD1, and AD0 choose 1 of 8 slave addresses. To conserve power, no internal pull-up resistors are incorporated on AD2, AD1, and AD0. Address values depending on AD2, AD1, and AD0 can be found in Table 3 “PCA8575 address map”. Remark: The General Call address (0000 0000b) and the Device ID address (1111 100Xb) are reserved and cannot be used as device address. Failure to follow this requirement will cause the PCA8575 not to acknowledge. The last bit of the first byte defines the operation to be performed. When set to logic 1 a read is selected, while a logic 0 selects a write operation. When AD2, AD1 and AD0 are held to VDD or VSS, the same address as the PCF8575 is applied. 7.1.1 Address map Fig 9. PCA8575 address R/W 002aab636 A6 A5 A4 A3 A2 A1 A0 programmable slave address Table 3. PCA8575 address map A6 A5 A4 A3 A2 A1 A0 Address (hex) 010000020h 010000121h 010001022h 010001123h 010010024h 010010125h 010011026h 010011127h |
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