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IP4770CZ16 Datasheet(PDF) 4 Page - NXP Semiconductors

Part No. IP4770CZ16
Description  VGA/video interface with integrated buffers, ESD protection and integrated termination resistors
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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IP4770CZ16 Datasheet(HTML) 4 Page - NXP Semiconductors

 
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IP4770CZ16_4771_4772_1
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 October 2006
4 of 11
NXP Semiconductors
IP4770/71/72CZ16
VGA/video interface with ESD protection
7.
Limiting values
[1]
Pins BYP, VCC(VIDEO) and VCC(SYNC) must be bypassed to ground (pin GND) via a low-impedance ground plane with 0.22 µF, low
inductance, chip ceramic capacitor at each supply pin.
ESD pulse is applied between the pins VIDEO_1, VIDEO_2, VIDEO_3, SYNC_OUT1, SYNC_OUT2, DDC_OUT1, DDC_OUT2 and
GND.
The bypass capacitor at pin BYP can be omitted. In this case the maximum ESD level for DDC_OUT1 and DDC_OUT2 pins is reduced
to
±4 kV.
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to ground (GND).
Symbol
Parameter
Conditions
Min
Max
Unit
VESD
electrostatic discharge voltage
IEC 61000-4-2; pins
VIDEO_1, VIDEO_2,
VIDEO_3, SYNC_OUT1,
SYNC_OUT2,
DDC_OUT1, DDC_OUT2
[1]
level 4; contact
−8+8
kV
level 4; air discharge
−15
+15
kV
IEC 61000-4-2; all other
pins
level 1; contact
−2+2
kV
level 1; air discharge
−2+2
kV
VCC(VIDEO)
video supply voltage
−0.5
5.5
V
VCC(DDC)
data display channel supply voltage
−0.5
5.5
V
VCC(SYNC)
synchronization supply voltage
−0.5
5.5
V
VI(VIDEO_1)
input voltage on pin VIDEO_1
−0.5
VCC(VIDEO)
V
VI(VIDEO_2)
input voltage on pin VIDEO_2
−0.5
VCC(VIDEO)
V
VI(VIDEO_3)
input voltage on pin VIDEO_3
−0.5
VCC(VIDEO)
V
VI(DDC_IN1)
input voltage on pin DDC_IN1
−0.5
VCC(DDC)
V
VI(DDC_IN2)
input voltage on pin DDC_IN2
−0.5
VCC(DDC)
V
VI(SYNC_IN1)
input voltage on pin SYNC_IN1
−0.5
VCC(SYNC)
V
VI(SYNC_IN2)
input voltage on pin SYNC_IN2
−0.5
VCC(SYNC)
V
VO(DDC_OUT1)
output voltage on pin DDC_OUT1
−0.5
VCC(DDC)
V
VO(DDC_OUT2)
output voltage on pin DDC_OUT2
−0.5
VCC(DDC)
V
Ptot
total power dissipation
Tamb = 25 °C
-
500
mW
Tstg
storage temperature
−55
+125
°C


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