Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

IDT72201 Datasheet(PDF) 4 Page - Integrated Device Technology

Part No. IDT72201
Description  CMOS SyncFIFO 64 X 9, 256 x 9, 512 x 9, 1024 X 9, 2048 X 9 and 4096 x 9
Download  19 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT72201 Datasheet(HTML) 4 Page - Integrated Device Technology

  IDT72201 Datasheet HTML 1Page - Integrated Device Technology IDT72201 Datasheet HTML 2Page - Integrated Device Technology IDT72201 Datasheet HTML 3Page - Integrated Device Technology IDT72201 Datasheet HTML 4Page - Integrated Device Technology IDT72201 Datasheet HTML 5Page - Integrated Device Technology IDT72201 Datasheet HTML 6Page - Integrated Device Technology IDT72201 Datasheet HTML 7Page - Integrated Device Technology IDT72201 Datasheet HTML 8Page - Integrated Device Technology IDT72201 Datasheet HTML 9Page - Integrated Device Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 19 page
background image
5.07
4
IDT72421/72201/72211/72221/72231/72241 CMOS SyncFIFO
64 x 9, 256 x 9, 512 x 9, 1024 x 9, 2048 x 9 and 4096 x 9
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS
(Commercial: VCC = 5V
± 10%, TA = 0°C to + 70°C; Military: VCC = 5V ± 10%, TA = –55°C to +125°C)
Com'l.
Commercial & Military
72421L12 72421L15
72421L20
72421L25 72421L35
72421L50
72201L12 72201L15
72201L20
72201L25 72201L35
72201L50
72211L12 72211L15
72211L20
72211L25 72211L35
72211L50
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Min. Max.
Min. Max. Min. Max.
Unit
fS
Clock Cycle Frequency
83.3
66.7
50
40
28.6
20
MHz
tA
Data Access Time
2
8
2
10
2
12
3
15
3
20
3
25
ns
tCLK
Clock Cycle Time
12
15
20
25
35
50
ns
tCLKH
Clock High Time
5
6
8
10
14
20
ns
tCLKL
Clock Low Time
5
6
8
10
14
20
ns
tDS
Data Set-up Time
3
4
5
6
8
10
ns
tDH
Data Hold Time
0
1
1
1
2
2
ns
tENS
Enable Set-up Time
3
4
5
6
8
10
ns
tENH
Enable Hold Time
0
1
1
1
2
2
ns
tRS
Reset Pulse Width(1)
12
15
20
25
35
50
ns
tRSS
Reset Set-up Time
12
15
20
25
35
50
ns
tRSR
Reset Recovery Time
12
15
20
25
35
50
ns
tRSF
Reset to Flag and Output Time
12
15
20
25
35
50
ns
tOLZ
Output Enable to Output in Low-Z(2)
0
0
0—
0—
0—
0
ns
tOE
Output Enable to Output Valid
3
7
3
8
3
10
3
13
3
15
3
28
ns
tOHZ
Output Enable to Output in High-Z(2)
3
7
3
8
3
10
3
13
3
15
3
28
ns
tWFF
Write Clock to Full Flag
8
10
12
15
20
30
ns
tREF
Read Clock to Empty Flag
8
10
12
15
20
30
ns
tAF
Write Clock to Almost-Full Flag
8
10
12
15
20
30
ns
tAE
Read Clock to Almost-Empty Flag
8
10
12
15
20
30
ns
tSKEW1
Skew time between Read Clock &
5
6
8
10
12
15
ns
Write Clock for Empty Flag &Full Flag
tSKEW2
Skew time between Read Clock &
22
28
35
40
42
45
ns
Write Clock for Almost-Empty Flag &
Almost-Full Flag
NOTES:
2655 tbl 07
1. Pulse widths less than minimum values are not allowed.
2. Values guaranteed by design, not currently tested.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn