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AD7765 Datasheet(PDF) 3 Page - Analog Devices |
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AD7765 Datasheet(HTML) 3 Page - Analog Devices |
3 / 21 page Preliminary Technical Data AD7765 Rev. PrC | Page 3 of 21 SPECIFICATIONS VDD1 = 2.5 V, VDD2 = 5 V, VREF = 4.096 V, TA = +25°C, Using the on-chip amplifier with components as shown in Table 7, unless otherwise noted.1 Table 1. Parameter Test Conditions/Comments Specifcation Unit DYNAMIC PERFORMANCE Decimate by 256 MCLK = 40MHz, ODR = 78.125kHz, FIN = 1kHz Sine Wave TBD dB min Dynamic Range Modulator inputs shorted 115 dB typ Signal to Noise Ratio (SNR)2 112 dB typ Spurious Free Dynamic Range (SFDR) TBD dBFS typ Input Amplitude = -0.5dB -105 dB typ TBD dB max Input Amplitude = -6dB dB typ Total Harmonic Distortion (THD) Input Amplitude = -60dB dB typ Decimate by 128 MCLK = 40MHz, ODR = 156.25kHz, FIN =100kHz Sine Wave TBD dB min Dynamic Range Modulator inputs shorted 112 dB typ Signal to Noise Ratio (SNR)2 109 dB typ Spurious Free Dynamic Range (SFDR) Non-harmonic dBFS typ Input Amplitude = -0.5dB dB typ TBD dB max Total Harmonic Distortion (THD) Input Amplitude = -6dB dB typ Intermodulation Distortion (IMD) Input Amplitude = -6dB, FINA= TBD KHz, FINB=TBD KHz TBD dB typ DC ACCURACY Resolution Guaranteed monotonic to 24 bits 24 Bits Integral Nonlinearity 0.00076 LSB typ 0.014 % typ Zero Error 0.02 % max Gain Error 0.018 % typ Zero Error Drift 0.00001 %FS/°C typ Gain Error Drift 0.0002 %FS/°C typ DIGITAL FILTER RESPONSE Decimate by 256 Group Delay MCLK = 40MHz 358 µS typ Decimate by 128 Group Delay MCLK = 40MHz 177 µS typ ANALOG INPUT Differential Input Voltage Vin(+) – Vin(-), VREF = 2.5V ±2 V pk-pk Vin(+) – Vin(-), VREF = 4.096V ±3.25 V pk-pk Input Capacitance At internal buffer inputs 5 pF typ At modulator inputs 55 pF typ REFERENCE INPUT/OUTPUT VREF Input Voltage VDD3 = 5V ± 5% +4.096 Volts VREF Input DC Leakage Current ±1 µA max VREF Input Capacitance 5 pF max |
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