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BSP108 Datasheet(PDF) 3 Page - NXP Semiconductors

Part No. BSP108
Description  N-channel enhancement mode vertical D-MOS transistor
Download  12 Pages
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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BSP108 Datasheet(HTML) 3 Page - NXP Semiconductors

 
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April 1995
3
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BSP108
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
THERMAL RESISTANCE
Note
1. Device mounted on an epoxy printed-circuit board 40 mm
× 40 mm × 1.5 mm; mounting pad for the collector lead
min. 6 cm2.
CHARACTERISTICS
Tj =25 °C unless otherwise specified
Drain-source voltage
VDS
max.
80 V
Gate-source voltage (open drain)
± V
GSO
max.
20 V
Drain current (DC)
ID
max.
500 mA
Drain current (peak)
IDM
max.
1.0 A
Total power dissipation up to Tamb =25 °C (note 1)
Ptot
max.
1.5 W
Storage temperature range
Tstg
−65 to + 150 °C
Junction temperature
Tj
max.
150
°C
From junction to ambient (note 1)
Rth j-a
=
83.3 K/W
Drain-source breakdown voltage
ID =10 µA; VGS =0
V(BR) DSS
min.
80 V
Gate threshold voltage
min.
max.
1.5
3.5
V
V
ID = 1 mA; VGS =VDS
VGS (th)
Gate-source leakage current
± V
GS =20V; VDS =0
IGSS
max.
100 nA
Drain-source leakage current
VDS = 60 V; VGS =0
IDSS
max.
1.0
µA
Drain-source ON-resistance
typ.
max.
2.0
3.0
ID = 500 mA; VGS =10V
RDS(on)
Transfer admittance
min.
typ.
150
300
mS
mS
ID = 500 mA; VDS =15V
 Yfs
Input capacitance at f = 1 MHz;
typ.
max.
45
60
pF
pF
VDS = 10 V; VGS =0
Ciss
Output capacitance at f = 1 MHz;
typ.
max.
30
45
pF
pF
VDS = 10 V; VGS =0
Coss


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