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NCP5602 Datasheet(PDF) 3 Page - ON Semiconductor

Part No. NCP5602
Description  High Efficiency Ultra Small Thinnest White LED Driver
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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NCP5602 Datasheet(HTML) 3 Page - ON Semiconductor

 
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NCP5602
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3
PIN FUNCTION DESCRIPTION
Pin No.
Symbol
Function
Description
1
GND
POWER
This pin is the GROUND signal for the analog and digital blocks and must be
connected to the system ground. This pin is the GROUND reference for the
DC−DC converter and the output current control. The pin must be connected
to the system ground, a ground plane being strongly recommended.
2
LED1
INPUT, POWER
This pin sinks to ground and monitors the current flowing into the first LED,
intended to be used in backlight application. The current is limited to 30 mA
maximum (see Note 2). When the ICON bit of the LED−REG register is
High, the LED2 fulfills the ICON function. In this case, LED1 is deactivated.
3
LED2
INPUT, POWER
This pin sinks to ground and monitors the current flowing into the second
LED, intended to be used in backlight application. The current is limited to
30 mA maximum (see Note 2). When the ICON bit of the LED−REG register
is High, the LED2 fulfills the ICON function. In this case, LED1 is
deactivated. The ICON current is 600
mA typical.
4
IREF
INPUT, ANALOG
This pin provides the reference current, based on the internal bandgap
voltage reference, to control the output current flowing in the LED. A 1%
tolerance, or better, resistor shall be used to get the highest accuracy of the
LED biases. An external current source can be used to bias this pin to dim
the light coming out of the LED.
In no case shall the voltage at pin 4 be forced either higher or lower than the
600 mV provided by the internal reference.
5
SDA
INPUT, DIGITAL
This pin carries the data provided by the I2C protocol. The content of the
SDA byte is used to program the mode of operation and to set up the output
current (see Table 2).
6
SCL
INPUT, DIGITAL
This pin carries the I2C clock to control the DC−DC converter and to set up
the output current. The SCL clock is associated with the SDA signal.
7
VOUT
OUTPUT, POWER
This pin provides the output voltage supplied by the DC−DC converter. The
Vout pin must be bypassed by 1.0
mF ceramic capacitor located as close as
possible to the pin to properly bypass the output voltage to ground. The
circuit shall not operate without such bypass capacitor properly connected to
the Vout pin.
The output voltage is internally clamped to 5.5 V maximum in the event of no
load situation. On the other hand, the output current is limited to 40 mA
(typical) in the event of a short circuit to ground.
8
C2P
POWER
One side of the external charge pump capacitor (CFLY ) is connected to this
pin, associated with C2N (see Note 1).
9
C2N
POWER
One side of the external charge pump capacitor (CFLY ) is connected to this
pin, associated with C2P (see Note 1).
10
C1P
POWER
One side of the external charge pump capacitor (CFLY ) is connected to this
pin, associated with C1N, pin 11 (see Note 1).
11
VBAT
INPUT, POWER
Input Battery voltage to supply the analog and digital blocks. The pin must be
decoupled to ground by a 1.0
mF ceramic capacitor.
12
C1N
POWER
One side of the external charge pump capacitor (CFLY ) is connected to this
pin, associated with C1P, pin 10 (see Note 1).
1. Using low ESR ceramic capacitor is mandatory to optimize the Charge Pump efficiency.
2. Total DC−DC output current is limited to 60 mA.


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