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NCP2892 Datasheet(PDF) 13 Page - ON Semiconductor

Part No. NCP2892
Description  1.3 Watt Audio Power Amplifier with Fast Turn On Time
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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NCP2892 Datasheet(HTML) 13 Page - ON Semiconductor

 
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NCP2892 Series
http://onsemi.com
13
Gain−Setting Resistor Selection (Rin and Rf)
Rin and Rf set the closed−loop gain of the amplifier.
In order to optimize device and system performance, the
NCP2892 should be used in low gain configurations.
The low gain configuration minimizes THD + noise
values and maximizes the signal to noise ratio, and the
amplifier can still be used without running into the
bandwidth limitations.
A closed loop gain in the range from 2 to 5 is
recommended to optimize overall system performance.
An input resistor (Rin) value of 22 k
W is realistic in most
of applications, and doesn’t require the use of a too large
capacitor Cin.
Input Capacitor Selection (Cin)
The input coupling capacitor blocks the DC voltage at
the amplifier input terminal. This capacitor creates a
high−pass filter with Rin, the cut−off frequency is given by
fc
+
1
2*
P *Rin *Cin
.
The size of the capacitor must be large enough to couple
in low frequencies without severe attenuation. However a
large input coupling capacitor requires more time to reach
its quiescent DC voltage (Vp/2) and can increase the
turn−on pops when a single ended audio input is used.
An input capacitor value between 33 nF and 220 nF
performs well in many applications (With Rin = 22 K
W).
Bypass Capacitor Selection (Cby)
The bypass capacitor Cby provides half−supply filtering
and determines how fast the NCP2892 turns on (see
Figure 21). With a differential audio input, the amplifier
will be a zero pop noise device no matter the bypass
capacitor.
With a single ended audio input, this capacitor is a
critical component to minimize the turn−on pop. A 1.0
mF
bypass capacitor value (Cin = < 0.39
mF) should produce
clickless and popless shutdown transitions. The amplifier
is still functional with a 0.1
mF capacitor value but is more
susceptible to “pop and click” noises.
Thus, a 1.0
mF bypassing capacitor is recommended.
Figure 34. Schematic of the Demonstration Board of the 9−Pin Flip−Chip CSP Device
+
+
Vp
INM
Vp
8
W
OUTA
OUTB
20 k
W
20 k
W
INP
BYPASS
20 k
W
100 nF
VM
VM_P
SHUTDOWN
CONTROL
C3
1
mF
1
mFC4
SHUTDOWN
R1
C1
AUDIO
INPUT
R2
100 k
W
R3
150 k
W
C2*
*C2, TP1: Not Mounted
J11
J5
J7
TP1*
Vp
Vp
J9
J8
J3
20 k
W
100 nF
R5
C5
R4
100 k
W


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