![]() |
Electronic Components Datasheet Search |
|
NCP1521 Datasheet(PDF) 8 Page - ON Semiconductor |
|
NCP1521 Datasheet(HTML) 8 Page - ON Semiconductor |
8 / 17 page ![]() NCP1521 http://onsemi.com 8 OPERATION DESCRIPTION Overview The NCP1521 uses a constant frequency, current mode step−down architecture. Both the main (P−Channel MOSFET) and synchronous (N−Channel MOSFET) switches are internal. It delivers a constant voltage from either a single Li−Ion or three cell NiMH/NiCd battery to portable devices such as cell phones and PDA. The output voltage is set by the external resistor divider. The NCP1521 sources at least 600 mA, depending on external components chosen. The NCP1521 works with two modes of operation; PWM/PFM depending on the current required. The device operates in PWM mode at load currents of approximately 40 mA or higher, having voltage tolerance of "3% with 90% efficiency or better. Lighter load currents cause the device to automatically switch into PFM mode for reduced current consumption (IQ = 30 mA typ) and extended battery life. Additional features include soft−start, undervoltage protection, current overload protection, and thermal shutdown protection. As shown in Figure 1, only six external components are required for implementation. The part uses an internal reference voltage of 0.6 V. It is recommended to keep the part in shutdown until the input voltage is 2.7 V or higher. PWM Operating Mode In this mode, the output voltage of the NCP1521 is regulated by modulating the on−time pulse width of the main switch Q1 at a fixed frequency of 1.5 MHz. The switching of the PMOS Q1 is controlled by a flip−flop driven by the internal oscillator and a comparator that compares the error signal from an error amplifier with the sum of the sensed current signal and compensation ramp. At the beginning of each cycle, the main switch Q1 is turned ON by the rising edge of the internal oscillator clock. The inductor current ramps up until the sum of the current sense signal and compensation ramp becomes higher than the error voltage amplifier. Once this has occurred, the PWM comparator resets the flip−flop, Q1 is turned OFF and the synchronous switch Q2 is turned ON. Q2 replaces the external Schottky diode to reduce the conduction loss and improve the efficiency. To avoid overall power loss, a certain amount of dead time is introduced to ensure Q1 is completely turned OFF before Q2 is being turned ON. Figure 25. PWM Switching Waveform (Vin = 3.6 V, Vout = 1.8 V, Iout = 300 mA) 125 ns/div PFM Operating Mode Under light load conditions (<40 mA), the NCP1521 enters in low current PFM mode operation to reduce power consumption. The output regulation is implemented by pulse frequency modulation. If the output voltage drops below the threshold of PFM comparator (typically Vnom−2%), a new cycle will be initiated by the PFM comparator to turn on the switch Q1. Q1 remains ON until the peak inductor current reaches 200 mA (nom). Then ILIM comparator goes high to switch off Q1. After a short dead time delay, switch rectifier Q2 is turned ON. The negative current detector (NCD) will detect when the inductor current drops below zero and sends the signal to turn off Q2. The output voltage continues to decrease through discharging the output capacitor. When the output voltage falls below the threshold of the PFM comparator, a new cycle starts immediately. Figure 26. PFM Mode Switching Waveform (Vin = 3.6 V, Vout = 1.8 V, Iout = 30 mA) 2.5 ms/div |