NCP1395A/B

http://onsemi.com

22

Protection Circuitry

This resonant controller differs from competitors due to

its protection features. The device can react to various

inputs like:

need to shutdown (sleep mode) or a way to force a

controlled burst mode (skip cycle at low output

power): as soon as the input level exceeds 1.0 V

typical, pulses are immediately stopped. On the

A version, when the input is released, the controller

performs a clean startup sequence without soft−start

unless the feedback voltage goes down below 0.6 V

during fault time (please see above for details). The

B version restarts with a soft−start sequence.

shutdown, where an event like a transient overload

does not immediately stopped pulses but start a timer.

If the event duration lasts longer than what the timer

imposes, then all pulses are disabled. The voltage on

the timer capacitor (pin 3) starts to decrease until it

reaches 1.0 V. The decrease rate is actually depending

on the resistor the user will put in parallel with the

capacitor, giving another flexibility during design.

Figure 48 depicts the architecture of the fault circuitry.

Vdd

Itimer

Reset

UVLO

Output

Current

Image

Rtimer

Ctimer

Ctimer

NINV

+

−

ON/OFF

1 = fault

0 = ok

+

Vref Fault

+ −

+

VtimerON

VtimerOFF

1 = ok

0 = fault

+

−

Vref Fault

+

−

+

Vref

Out

CC Regulation

Compensation

Slow Fault

Fast Fault

+

1 = ok

0 = fault

DRIVING

LOGIC

SS

A

A

B

B

Reset

To FB

Fast

Input

Figure 48. This Circuit Combines a Slow and Fast Input for Improved Protection Features