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NCP1395ADR2G Datasheet(PDF) 15 Page - ON Semiconductor |
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NCP1395ADR2G Datasheet(HTML) 15 Page - ON Semiconductor |
15 / 27 page NCP1395A/B http://onsemi.com 15 • Finally, Two Circuit Versions, A and B: The A and B versions differ because of the following changes: 1. The startup thresholds are different, the A starts to pulse for VCC = 12.8 V whereas the B pulses for VCC = 10 V. The turn off levels are the same, however. The A is recommended for consumer products where the designer can use an external startup resistor, whereas the B is more recommended for industrial/medical applications where a 12 V auxiliary supply directly powers the chip. 2. The A version does not activate the soft−start upon release of the fast fault input. This is to let the designer implement skip cycle. To the opposite, the B version goes back to operation upon the fast fault pin release via a soft−start sequence. Voltage−Controlled Oscillator The VCO section features a high−speed circuitry allowing an internal operation from 100 kHz up to 2.0 MHz. However, as a division by two internally creates the two Q and Qbar outputs, the final effective signal on output A and B switches between 50 kHz and 1.0 MHz. The VCO is configured in such a way that if the feedback pin goes up, the switching frequency also goes up. Figure 33 shows the architecture of this oscillator. Vref Vdd Fmin Rt−m sets Fmin for V(FB) < Vfb_off Cint Imin + − 0 to I_Fmax IDT FBinternal max Fsw max + − + Clk D S Q Q R AB Vref Vdd Rdt sets the deadtime DT Imin Vdd Fmax Rt−max sets the maximum Fsw Vcc FB Rfb 20 k + − + Vfb < Vb_fault start fault timer Figure 33. Simplified VCO Architecture Vb_fault |
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