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NCP1239VDR2G Datasheet(PDF) 14 Page - ON Semiconductor |
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NCP1239VDR2G Datasheet(HTML) 14 Page - ON Semiconductor |
14 / 38 page NCP1239 http://onsemi.com 14 Figure 33. Fault Management 10ms* Jittering 100ms* fmax fmin 0.9 V Error flag 16.4V 11.2V Fb is ok Fault occurs here 6.9V OVL signal (Over−Load) DRV Vcc Reset at UVLO Fault not confirmed PFC off PFC on 1.8V 3.0V 4.3V PFC off 100ms* Fault confirmed New Startup attempt 0.9 V Error flag 0.9 V Error flag Fault Management *This time is programmed by the Pin 6 capacitor. Cpin6 = 390 nF nearly sets the following intervals: − Soft−Start Time (Tss):7.5 ms − Jittering Period (Tjittering): 10 ms − Fault Detection Delay (Tdelay): 100 ms More generally, the times approximately depend on Cpin6 as follows: −Tss = 7.5 ms * Cpin6 / 390 nF −Tjittering =10 ms * Cpin6 / 390 nF −Tdelay =100 ms * Cpin6 / 390 nF |
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