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NCP1271 Datasheet(PDF) 11 Page - ON Semiconductor

Part # NCP1271
Description  Soft?뭆kip Mode Standby PWM Controller with Adjustable Skip Level and External Latch
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCP1271 Datasheet(HTML) 11 Page - ON Semiconductor

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NCP1271
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11
cleared after the double hiccup, then the application
restarts. If not, then the process is repeated.
4. Latched Shutdown – When the Skip/latch pin (Pin
1) voltage is pulled above 8.0 V for more than
13
ms, the NCP1271 goes into latchoff shutdown.
The output is held low and VCC stays in hiccup
mode until the latch is reset. The reset can only
occur if Vcc is allowed to fall below VCC(reset)
(4.0 V typical). This is generally accomplished by
unplugging the main input AC source.
5. Non−Latched Shutdown – If the FB pin is pulled
below the skip level, then the device will enter a
non−latched shutdown mode. This mode disables
the driver, but the controller automatically recovers
when the pulldown on FB is released. Alternatively,
Vcc can also be pulled low (below 190 mV) to
shutdown the controller. This has the added benefit
of placing the part into a low current consumption
mode for improved power savings.
Biasing the Controller
During startup, the Vcc bias voltage is supplied by the
HV Pin (Pin 8). This pin is capable of supporting up to
500 V, so it can be connected directly to the bulk capacitor.
Internally, the pin connects to a current source which
rapidly charges VCC to its VCC(on) threshold. After this
level is reached, the controller turns on and the transformer
auxiliary winding delivers the bias supply voltage to VCC.
The startup FET is then turned off, allowing the standby
power loss to be minimized. This in−chip startup circuit
minimizes the number of external components and Printed
Circuit Board (PCB) area. It also provides much lower
power dissipation and faster startup times when compared
to using startup resistors to VCC. The auxiliary winding
needs to be designed to supply a voltage above the VCC(off)
level but below the maximum VCC level of 20 V.
For added protection, the NCP1271 also include a dual
startup mode. Initially, when VCC is below the inhibit
voltage Vinhibit(600 mV typical), the startup current source
is small (200 uA typical). The current goes higher (4.1 mA
typical) when VCC goes above Vinhibit. This behavior is
illustrated in Figure 23. The dual startup feature protects
the device by limiting the maximum power dissipation
when the VCC pin (Pin 6) is accidentally grounded. This
slightly increases the total time to charge VCC, but it is
generally not noticeable.
Figure 23. Startup Current at Various VCC Levels
V
VCC(on)
CC
4.1 mA
200 uA
Startup current
0.6 V
VCC(latch)
VCC Double Hiccup Mode
Figure 24 illustrates the block diagram of the startup
circuit. An undervoltage lockout (UVLO) comparator
monitors the VCC supply voltage. If VCC falls below
VCC(off), then the controller enters “double hiccup mode.”
Figure 24. VCC Management
Vcc
HV
8
6
12.6/
5.8 V
9.1 V
turn off
UVLO
+
+
turn on internal bias
&
double
hiccup
Q
R
20V
4.1 mA when Vcc > 0.6 V
200 uA when Vcc < 0.6 V
B2
Counter
S
Vbulk
During double hiccup operation, the Vcc level falls to
VCC(latch) (5.8 V typical). At this point, the startup FET is
turned back on and charges VCC to VCC(on)(12.6 V typical).
VCC then slowly collapses back to the VCC(latch) level. This
cycle is repeated twice to minimize power dissipation in


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