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AD5522 Datasheet(PDF) 3 Page - Analog Devices

Part No. AD5522
Description  Quad Parametric Measurement Unit With Integrated 16-Bit Level Setting DACs
Download  45 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5522 Datasheet(HTML) 3 Page - Analog Devices

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Preliminary Technical Data
AD5522
Rev. PrL | Page 3 of 45
DUTGND
MEASVH 0
GUARD 0
CPOL0/ SCLK
CPOH0/ SDI
GUARDIN 0/
DUTGND 0
DUT
EXTERNAL
RSENSE
(CURRENTS
UP TO 64mA)
EXTMEASIH 0
EXTMEASIL 0
FOH 0
EXTFOH 0
CFF 0
FIN
CLH
CLL
AVSS(0-4)
AGND
AVDD(0-4)
+
-
MEASOUT 0
CH0
DGND
CPH
COMPARATOR
CCOMP 0
INTERNAL RANGE SELECT
(5uA, 20uA, 200uA, 2mA)
-
-
-
-
-
-
+
+
+
+
+
+
RSENSE
- +
VREF
SYS_FORCE
SYS_SENSE
DVCC
x5 or x10
x1
AGND
OFFSET DAC
BIAS TO
CENTER
IRANGE
10k
FORCE
AMPLIFER
MEASURE
CURRENT
IN AMP
SW 1
SW 2
SW 3
SW 5
SW 6
SW 4
SW 9
SW 8
SW 7
MEASURE
VOLTAGE
IN AMP
CGALM
SCLK
SYNC
SDI
SDO
CPOL2/CPO0
SERIAL
INTERFACE
CPOL1/ SYNC
CPOH1/ SDO
RESET
BUSY
16
CLAMP &
GUARD
ALARM
CPOH2/CPO1
CPOL3
/CPO2
CPOH3
/CPO3
POWER ON
RESET
TEMP
SENSOR
TMPALM
16
16-Bit
OFFSET
DAC
TO ALL DAC
OUTPUT
AMPLIFIERS
TO
MEASOUT
MUX
DUTGND
MEASVH 3
GUARD 3
GUARDIN 3/
DUTGND 3
DUT
EXTERNAL
RSENSE
(CURRENTS
UP TO 64mA)
EXTMEASIH 3
EXTMEASIL 3
FOH 3
EXTFOH 3
CFF 3
FIN
CLH
CLL
+
-
MEASOUT 3
CPH
COMPARATOR
INTERNAL RANGE SELECT
(5uA, 20uA, 200uA, 2mA)
-
-
-
-
-
-
+
+
+
+
+
+
RSENSE
- +
x5 or x10
x1
10k
FORCE
AMPLIFER
MEASURE
CURRENT
IN AMP
SW 1
SW 2
SW 3
SW 5
SW 6
SW 4
SW 9
SW 8
SW 7
MEASURE
VOLTAGE
IN AMP
CH1
CH3
CH2
CCOMP 3
MEASVH 2
EXTMEASIL 2
FOH 2
EXTFOH 2
CFF 2
EXTMEASIH 2
GUARD 2
GUARDIN 2/DUTGND 2
MEASVH 1
EXTMEASIL 1
FOH 1
EXTFOH 1
CFF 1
EXTMEASIH 1
GUARD 1
GUARDIN 1/DUTGND 1
MEASOUT 1
CCOMP 1
MEASOUT 2
CCOMP 2
DUTGND
DUTGND
16
16
16
CPL
-
+
16
16
16
16
16
X1 REG
CREG
MREG
16
16
16
16
16
16
16
16
16-Bit
FIN DAC
*2
16-Bit
CLH DAC
MEASOUT
MUX & GAIN
x1/x0.2
X1 REG
CREG
MREG
X1 REG
CREG
MREG
*2
16
16
16
16
X1 REG
CREG
MREG
*6
OFFSET DAC
16-Bit
CLL DAC
16-Bit
CPH DAC
16-Bit
CPL DAC
SW 10
SW 11
TEMP
SENSOR
SW 12
X1 REG
CREG
MREG
*6
X2 REG
X2 REG
16
16
16
CPL
-
+
16
16
16
16
16
X1 REG
CREG
MREG
16
16
16
16
16
16
16
16
16-Bit
FIN DAC
*2
16-Bit
CLH DAC
MEASOUT
MUX & GAIN
x1/x0.2
X1 REG
CREG
MREG
X1 REG
CREG
MREG
*2
16
16
16
16
X1 REG
CREG
MREG
*6
OFFSET DAC
16-Bit
CLL DAC
16-Bit
CPH DAC
16-Bit
CPL DAC
SW 10
SW 11
TEMP
SENSOR
SW 12
X1 REG
CREG
MREG
*6
X2 REG
X2 REG
X2 REG
*6
X2 REG
*6
X2 REG
*6
*2
*2
X2 REG
*6
X2 REG
*6
X2 REG
*6
*2
*2
AGND
AGND
EN
MUX
MUX
LVDS/
SPI
LOAD
AGND
AGND
AGND
REFGND
AGND
AGND
EN
SW 13
SW 13
GUARD AMP
SW 14
GUARD AMP
SW 14
AGNDx
10k
SW 15
SW 16
SW 16
AGND
10k
SW 15
DUTGND
AGND
10k
SW 15a
OFFSET DAC
BIAS TO
CENTER
IRANGE
Figure 2. Detailed Block Diagram


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