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DS90LV028AH Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part No. DS90LV028AH
Description  High Temperature 3V LVDS Dual Differential Line Receiver
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com

DS90LV028AH Datasheet(HTML) 3 Page - National Semiconductor (TI)

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Note 9: tSKD2 is the differential channel-to-channel skew of any event on the same device. This specification applies to devices having multiple receivers within the
integrated circuit.
Note 10: tSKD3, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices at the same VCC
and within 5˚C of each other within the operating temperature range.
Note 11:
tSKD4, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over the
recommended operating temperature and voltage ranges, and across process distribution. tSKD4 is defined as |Max − Min| differential propagation delay.
Note 12: VCC is always higher than RIN+ and RIN− voltage. RIN+ and RIN− are allowed to have voltage range −0.05V to +3.05V. VID is not allowed to be greater
than 100 mV when VCM =0Vor3V.
Note 13: fMAX generator input conditions: tr =tf < 1 ns (0% to 100%), 50% duty cycle, differential (1.05V to 1.35 peak to peak). Output criteria: 60%/40% duty cycle,
VOL (max 0.4V), VOH (min 2.7V), load = 15 pF (stray plus probes).
Parameter Measurement Information
Typical Application
Applications Information
General application guidelines and hints for LVDS drivers
and receivers may be found in the following application
notes: LVDS Owner’s Manual (lit #550062-003), AN-808,
AN-977, AN-971, AN-916, AN-805, AN-903.
LVDS drivers and receivers are intended to be primarily used
in an uncomplicated point-to-point configuration as is shown
in Figure 3. This configuration provides a clean signaling
environment for the fast edge rates of the drivers. The re-
ceiver is connected to the driver through a balanced media
which may be a standard twisted pair cable, a parallel pair
cable, or simply PCB traces. Typically the characteristic
impedance of the media is in the range of 100
Ω. A termina-
tion resistor of 100
Ω should be selected to match the media,
and is located as close to the receiver input pins as possible.
The termination resistor converts the driver output (current
mode) into a voltage that is detected by the receiver. Other
configurations are possible such as a multi-receiver configu-
ration, but the effects of a mid-stream connector(s), cable
FIGURE 1. Receiver Propagation Delay and Transition Time Test Circuit
FIGURE 2. Receiver Propagation Delay and Transition Time Waveforms
Balanced System
FIGURE 3. Point-to-Point Application

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