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DS3183N Datasheet(PDF) 7 Page - Maxim Integrated Products

Part # DS3183N
Description  Single/Dual/Triple/Quad ATM/Packet PHYs with Built-In LIU
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS3183N Datasheet(HTML) 7 Page - Maxim Integrated Products

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DS3181/DS3182/DS3183/DS3184
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12.12 DS3/E3 PLCP ........................................................................................................................................... 311
12.12.1 Transmit Side PLCP........................................................................................................................... 311
12.12.2 Receive Side PLCP Register Map ..................................................................................................... 315
12.13 FIFO REGISTERS........................................................................................................................................ 323
12.13.1 Transmit FIFO Register Map.............................................................................................................. 323
12.13.2 Receive FIFO Register Map............................................................................................................... 326
12.14 CELL/PACKET PROCESSOR.......................................................................................................................... 328
12.14.1 Transmit Cell Processor Register Map .............................................................................................. 328
12.14.2 Receive Cell Processor...................................................................................................................... 335
12.14.3 Transmit Packet Processor Register Map ......................................................................................... 345
12.14.4 Receive Packet Processor Register Map .......................................................................................... 350
13 JTAG INFORMATION
359
13.1 JTAG DESCRIPTION.................................................................................................................................... 359
13.2 JTAG TAP CONTROLLER STATE MACHINE DESCRIPTION ............................................................................. 359
13.3 JTAG INSTRUCTION REGISTER AND INSTRUCTIONS ...................................................................................... 361
13.4 JTAG ID CODES......................................................................................................................................... 363
13.5 JTAG FUNCTIONAL TIMING.......................................................................................................................... 363
13.6 IO PINS ...................................................................................................................................................... 363
14 PIN ASSIGNMENT
364
15 PACKAGE MECHANICAL DIMENSIONS
367
16 PACKAGE THERMAL INFORMATION
370
17 DC ELECTRICAL CHARACTERISTICS
371
18 AC TIMING CHARACTERISTICS
373
18.1 FRACTIONAL PORT CHARACTERISTICS.......................................................................................................... 375
18.2 LINE INTERFACE AC CHARACTERISTICS ....................................................................................................... 375
18.3 MISCELLANEOUS PIN AC CHARACTERISTICS ................................................................................................ 376
18.4 OVERHEAD PORT AC CHARACTERISTICS...................................................................................................... 376
18.5 SYSTEM INTERFACE AC CHARACTERISTICS.................................................................................................. 377
18.6 MICRO INTERFACE AC CHARACTERISTICS .................................................................................................... 379
18.7 CLAD JITTER CHARACTERISTICS................................................................................................................. 382
18.8 LIU INTERFACE AC CHARACTERISTICS ........................................................................................................ 382
18.8.1 Waveform Templates ......................................................................................................................... 382
18.8.2 LIU Input/Output Characteristics........................................................................................................ 386
18.9 JTAG INTERFACE AC CHARACTERISTICS..................................................................................................... 388
19 REVISION HISTORY
389


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