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LH28F640BFHG-PBTLZ7 Datasheet(PDF) 30 Page - Sharp Corporation |
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LH28F640BFHG-PBTLZ7 Datasheet(HTML) 30 Page - Sharp Corporation |
30 / 36 page LHF64FD5 28 Rev. 2.44 1.2.7 Block Erase, Full Chip Erase, (Page Buffer) Program and OTP Program Performance(3) NOTES: 1. Typical values measured at VCC=3.0V, VPP=3.0V or 12V, and TA=+25°C. Assumes corresponding lock bits are not set. Subject to change based on device characterization. 2. Excludes external system-level overhead. 3. Sampled, but not 100% tested. 4. A latency time is required from writing suspend command (WE# or CE# going high) until SR.7 going "1". 5. If the interval time from a Block Erase Resume command to a subsequent Block Erase Suspend command is shorter than tERES and its sequence is repeated, the block erase operation may not be finished. VCC=2.7V-3.6V, TA=-40°C to +85°C Symbol Parameter Notes Page Buffer Command is Used or not Used VPP=VPPH1 (In System) VPP=VPPH2 (In Manufacturing) Unit Min. Typ.(1) Max.(2) Min. Typ.(1) Max.(2) tWPB 4K-Word Parameter Block Program Time 2 Not Used 0.05 0.3 0.04 0.12 s 2 Used 0.03 0.12 0.02 0.06 s tWMB 32K-Word Main Block Program Time 2 Not Used 0.38 2.4 0.31 1.0 s 2 Used 0.24 1.0 0.17 0.5 s tWHQV1/ tEHQV1 Word Program Time 2 Not Used 11 200 9 185 µs 2 Used 7 100 5 90 µs tWHOV1/ tEHOV1 OTP Program Time 2 Not Used 36 400 27 185 µs tWHQV2/ tEHQV2 4K-Word Parameter Block Erase Time 2 - 0.3 4 0.2 4 s tWHQV3/ tEHQV3 32K-Word Main Block Erase Time 2 - 0.6 5 0.5 5 s Full Chip Erase Time 2 80 700 65 700 s tWHRH1/ tEHRH1 (Page Buffer) Program Suspend Latency Time to Read 4- 5 10 5 10 µs tWHRH2/ tEHRH2 Block Erase Suspend Latency Time to Read 4- 5 20 5 20 µs tERES Latency Time from Block Erase Resume Command to Block Erase Suspend Command 5- 500 500 µs |
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