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ADP3120A Datasheet(PDF) 1 Page - Analog Devices

Part No. ADP3120A
Description  Dual Bootstrapped, 12 V MOSFET Driver with Output Disable
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADP3120A Datasheet(HTML) 1 Page - Analog Devices

 
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Dual Bootstrapped, 12 V MOSFET
Driver with Output Disable
ADP3120A
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
FEATURES
All-in-one synchronous buck driver
Bootstrapped high-side drive
One PWM signal generates both drives
Anticross conduction protection circuitry
OD for disabling the driver outputs
Meets CPU VR requirement when used with
Analog Devices Flex -Mode™1 controller
APPLICATIONS
Multiphase desktop CPU supplies
Single-supply synchronous buck converters
GENERAL DESCRIPTION
The ADP3120A is a dual, high voltage MOSFET driver
optimized for driving two N-channel MOSFETs, the two switches
in a nonisolated synchronous buck power converter. Each
driver is capable of driving a 3000 pF load with a 45 ns propaga-
tion delay and a 25 ns transition time. One of the drivers can be
bootstrapped and is designed to handle the high voltage slew
rate associated with floating high-side gate drivers. The
ADP3120A includes overlapping drive protection to prevent
shoot-through current in the external MOSFETs.
The OD pin shuts off both the high-side and the low-side
MOSFETs to prevent rapid output capacitor discharge during
system shutdown.
The ADP3120A is specified over the commercial temperature
range of 0°C to 85°C and is available in 8-lead SOIC_N and
8-lead LFCSP_VD packages.
1 Flex-Mode is protected by U.S. Patent 6683441; other patents pending.
FUNCTIONAL BLOCK DIAGRAM
2
3
OD
IN
ADP3120A
VCC
BST
DRVH
SW
DRVL
PGND
DELAY
VCC
6
DELAY
CMP
CMP
1V
4
1
7
CONTROL
LOGIC
6
5
8
RBST
RG
CBST1
D1
CBST2
12V
Q1
TO
INDUCTOR
Q2
R1
LATCH
R2
Q
S
Figure 1.


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