Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

ADP3118 Datasheet(PDF) 3 Page - Analog Devices

Part No. ADP3118
Description  Dual Bootstrapped 12 V MOSFET Driver with Output Disable
Download  16 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  AD [Analog Devices]
Homepage  http://www.analog.com
Logo 

ADP3118 Datasheet(HTML) 3 Page - Analog Devices

 
Zoom Inzoom in Zoom Outzoom out
 3 / 16 page
background image
ADP3118
Rev. 0 | Page 3 of 16
SPECIFICATIONS1
VCC = 12 V, BST = 4 V to 26 V, TA = 0°C to 85°C, unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
PWM INPUT
Input Voltage High
2.0
V
Input Voltage Low
0.8
V
Input Current
−1
+1
µA
Hysteresis
90
250
mV
OD INPUT
Input Voltage High
2.0
V
Input Voltage Low
0.8
V
Input Current
−1
+1
µA
Hysteresis
90
250
mV
Propagation Delay Times2
tpdlOD
See Figure 3
20
35
ns
tpdhOD
See Figure 3
40
55
ns
HIGH-SIDE DRIVER
Output Resistance, Sourcing Current
BST − SW = 12 V
2.2
3.5
Output Resistance, Sinking Current
BST − SW = 12 V
1.0
2.5
Output Resistance, Unbiased
BST − SW = 0 V
10
kΩ
Transition Times
trDRVH
BST − SW = 12 V, CLOAD = 3 nF, see Figure 4
25
40
ns
tfDRVH
BST − SW = 12 V, CLOAD = 3 nF, see Figure 4
20
30
ns
Propagation Delay Times2
tpdhDRVH
BST − SW = 12 V, CLOAD = 3 nF, see Figure 4
25
40
ns
tpdlDRVH
BST − SW = 12 V, CLOAD = 3 nF, see Figure 4
25
35
ns
SW Pull-Down Resistance
SW to PGND
10
kΩ
LOW-SIDE DRIVER
Output Resistance, Sourcing Current
2.0
3.2
Output Resistance, Sinking Current
1.0
2.5
Output Resistance, Unbiased
VCC = PGND
10
kΩ
Transition Times
trDRVL
CLOAD = 3 nF, see Figure 4
20
35
ns
tfDRVL
CLOAD = 3 nF, see Figure 4
16
30
ns
Propagation Delay Times2
tpdhDRVL
CLOAD = 3 nF, see Figure 4
12
35
ns
tpdlDRVL
CLOAD = 3 nF, see Figure 4
30
45
ns
Timeout Delay
SW = 5 V
110
190
ns
SW = PGND
95
150
ns
SUPPLY
Supply Voltage Range
VCC
4.15
13.2
V
Supply Current
ISYS
BST = 12 V, IN = 0 V
2
5
mA
UVLO Voltage
VCC rising
1.5
3.0
V
Hysteresis
350
mV
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.
2 For propagation delays, tpdh refers to the specified signal going high, and tpdl refers to it going low.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn