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ADN2880 Datasheet(PDF) 5 Page - Analog Devices

Part No. ADN2880
Description  3.2 Gbps, 3.3 V, Low Noise, Transimpedance Amplifier
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADN2880 Datasheet(HTML) 5 Page - Analog Devices

 
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ADN2880
Rev. 0 | Page 5 of 12
PAD LAYOUT AND FUNCTION DESCRIPTIONS
2
3
4
5
678
9
11
12
1
13
14
15
16
17
GND
IN
TEST
FILTER
FILTER
GND
OUTB
OUT
GND
10
GND
CAP
RSSI
GND
VCC
VCC
VCCFILTER
GND
Figure 2. Pad Layout
Table 3. Pad Function Descriptions
Pad No.
Mnemonic
Pin Type1
Description
1
GND
P
Ground. (Input return.)
2
IN
AI
Current Input. Bond directly to a photodiode (PD) anode.
3
TEST
AI
Test Probe Pad. Do not connect.
4, 5
FILTER
AO
Filter Output. Pad 4 and Pad 5 are metal connected. Optional bond to a PD cathode.
6
GND
P
Ground.
7
RSSI
AO
Voltage Output. Provides average input current monitoring. If not used, connect to ground.
8
CAP
AI
Low Frequency Cutoff (LFC) Setpoint. For SONET applications, see Figure 10 and contact sales
for assembly details.
9, 10, 13, 14
GND
P
Ground. (Output return.)
11
OUTB
AO
Negative Output, CML, On-Chip 50 Ω Termination (AC or DC Termination).
12
OUT
AO
Positive Output, CML, On-Chip 50 Ω Termination (AC or DC Termination).
15
VCCFILTER
P
On-Chip Filter Supply. Connect to VCC to Enable On-Chip RC Filter (200 Ω, 20 pF). Leave
unconnected if not used.
16, 17
VCC
P
3.3 V Supply. Place a 200 pF, RF decoupling capacitor close to the power pad to reduce
the power noise.
1 P = power; AI = analog input; and AO = analog output.


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