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NB4N441 Datasheet(PDF) 3 Page - ON Semiconductor

Part No. NB4N441
Description  3.3V Serial Input MultiProtocol PLL Clock Synthesizer, Differential LVPECL Output
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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NB4N441 Datasheet(HTML) 3 Page - ON Semiconductor

 
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NB4N441
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3
Table 1. PIN DESCRIPTION
Pin
Name
I/O
Description
11, 12, 13, 24
VCC
Power Supply
Positive supply voltage.
3
VCC_PLL
PLL Power Supply
Positive supply voltage for the PLL.
1, 6, 9, 18, 19
GND
Ground
Ground.
20
LOCKED
LVTTL Lock Output
When Low, this output provides indication that the PLL is
locked and the device is in proper operating mode. When
High, the PLL is out of lock.
2, 4, 5, 10, 14
NC
No Connect.
8
CLK / XTAL1,
LVTTL/LVCMOS Single Ended
Clock or XTAL Inputs
The crystal is connected between the XTAL1 and XTAL2 pin.
If driving single−ended, use XTAL1 and leave XTAL2
floating.
7
XTAL2
15
SLOAD**
LVTTL / LVCMOS,
Serial Load Input
Serial Load.
16
SDATA**
LVTTL / LVCMOS
Serial Data Input
Serial Data Input.
17
SCLOCK**
LVTTL / LVCMOS
Serial Clock Input
Serial Clock Input.
21
OE*
LVTTL Input
Synchronous Output Enable. When OE is HIGH or left
OPEN, the outputs are enabled. When OE is LOW, the
outputs are disabled.
22, 23
CLKOUT
CLKOUT
LVPECL Output
Differential LVPECL Clock Outputs, Typically terminated with
50 W resistor to VCC – 2.0 V.
EP
The Exposed Pad on the 24 pin QFN package bottom is
thermally connected to the die for improved heat transfer out
of package. The pad is not electrically connected to the die,
but is recommended to be electrically connected to GND on
the PC board.
*Pins will default HIGH when left Open
**Pins will default LOW when left Open


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