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NB4L858M Datasheet(PDF) 1 Page - ON Semiconductor

Part No. NB4L858M
Description  2.5V/3.3V, 3 GHz Dual Differential Clock/Data 2x2 Crosspoint Switch with CML Output and Internal Termination
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
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NB4L858M Datasheet(HTML) 1 Page - ON Semiconductor

 
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© Semiconductor Components Industries, LLC, 2005
December, 2005 − Rev. 9
1
Publication Order Number:
NB4L858M/D
NB4L858M
2.5V/3.3V, 3 GHz Dual
Differential Clock/Data 2x2
Crosspoint Switch with
CML Output and Internal
Termination
Description
The NB4L858M is a high−bandwidth low voltage fully differential
dual 2 x 2 crosspoint switch with CML outputs that is suitable for
applications such as SDH/SONET DWDM and high speed switching
applications. Design technique minimizes jitter accumulation,
crosstalk, and signal skew which make this device ideal for
loop−through and protection channel switching application. Each
2 x 2 crosspoint switch can fan out and/or multiplex up to 3 Gb/s data
and 3 GHz clock signals.
Differential inputs incorporate a pair of internal 50
W termination
resistors in a center−tapped configuration (VTDx Pins) and can accept
LVPECL (Positive ECL) or CML input signal without any external
component. This feature provides transmission line termination
on−chip, at the receiver end, eliminating external components.
Differential 16 mA CML output provides matching internal 50
W
terminations, and 400 mV output swings when externally terminated,
50
W to VCC.
The SELECT inputs are single−ended and can be driven with either
LVCMOS or LVTTL input levels. The device is housed in a low
profile 7 x 7 mm 32−pin LQFP package.
Features
Maximum Input Clock Frequency 3 GHz
Maximum Input Data Frequency 3 Gb/s
350 ps Typical Propagation Delay
80 ps Typical Rise and Fall Times
12 ps Channel to Channel Skew
0.5 ps RMS Jitter
5 ps Deterministic Jitter @ 2.5 Gb/s
Operating Range: VCC = 2.3V to 3.6 V with GND = 0 V
CML Output Level (400 mV Peak−to−Peak Output), Differential
Output
These are Pb−Free Devices
32
1
LQFP−32
FA SUFFIX
CASE 873A
MARKING
DIAGRAM*
NB4L
858M
AWLYYWW
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G
= Pb−Free Package
50
W
50
W
50
W
50
W
50
W
50
W
50
W
50
W
SELA0
DA0
VTDA0
DA0
DA1
VTDA1
DA1
DB0
VTDB0
DB0
DB1
VTDB1
DB1
SELA1
SELB0
SELB1
QA0
QA0
QA1
QA1
QB0
QB0
QB1
QB1
A0
A1
B0
B1
0
1
0
1
0
1
0
1
Figure 1. Functional Block Diagram


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