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MC10H171 Datasheet(PDF) 1 Page - ON Semiconductor

Part No. MC10H171
Description  Dual Binary to 1-4 Decoder (Low)
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC10H171 Datasheet(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 7
1
Publication Order Number:
MC10H171/D
MC10H171
Dual Binary to 1−4 Decoder
(Low)
Description
The MC10H171 is a binary coded 2 line to dual 4 line decoder with
selected outputs low. With either E0 or E1 high, the corresponding
selected 4 outputs are high. The common enable E, when high, forces
all outputs high.
Features
Propagation Delay, 2 ns Typical
Power Dissipation 325 mW Typical (same as MECL 10K™)
Improved Noise Margin 150 mV (over operating voltage and
temperature range)
Voltage Compensated
MECL 10K Compatible
Pb−Free Packages are Available*
LOGIC DIAGRAM
DIP
PIN ASSIGNMENT
VCC1
E1
Q13
Q12
Q11
Q10
B
VEE
VCC2
E
E0
Q00
Q01
Q02
Q03
A
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
E0 14
A 9
B 7
E 15
E1 2
10 Q0 3
11 Q0 2
12 Q0 1
13 Q0 0
3 Q1 3
4 Q1 2
5 Q1 1
6 Q1 0
Pin assignment is for Dual−in−Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING DIAGRAMS*
PDIP−16
P SUFFIX
CASE 648
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
16
1
16
1
MC10H171P
AWLYYWWG
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G= Pb−Free Package
PLLC−20
FN SUFFIX
CASE 775
20 1
10H171G
AWLYYWW
120


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