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EMG2DXV5T1 Datasheet(PDF) 1 Page - ON Semiconductor

Part No. EMG2DXV5T1
Description  Dual Bias Resistor Transistors NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

EMG2DXV5T1 Datasheet(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2005
October, 2005 − Rev. 0
1
Publication Order Number:
EMG5DXV5/D
EMG2DXV5T1,
EMG5DXV5T1
Preferred Devices
Dual Bias Resistor
Transistors
NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base−emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the
SOT−553 package which is designed for low power surface mount
applications.
Features
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Moisture Sensitivity Level: 1
Available in 8 mm, 7 inch Tape and Reel
Lead−Free Solder Plating
Pb−Free Packages are Available
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
Collector Current
IC
100
mAdc
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Total Device Dissipation
TA = 25°C
Derate above 25
°C
PD
230 (Note 1)
338 (Note 2)
1.8 (Note 1)
2.7 (Note 2)
mW
°C/W
Thermal Resistance −
Junction-to-Ambient
RqJA
540 (Note 1)
370 (Note 2)
°C/W
Thermal Resistance −
Junction-to-Lead
RqJL
264 (Note 1)
287 (Note 2)
°C/W
Junction and Storage
Temperature Range
TJ, Tstg
−55 to +150
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. FR−4 @ Minimum Pad
2. FR−4 @ 1.0 x 1.0 inch Pad
SOT−553
CASE 463B
Preferred devices are recommended choices for future use
and best overall value.
NPN SILICON
BIAS RESISTOR
TRANSISTORS
MARKING
DIAGRAM
xx = Device Code
xx= UF (EMG5)
UP (EMG2)
M = Date Code
G = Pb−Free Package
XX M
G
G
http://onsemi.com
1
5
1
5
(4)
R1
R2
R1
(3)
(1)
(2)
(5)
R2
DTr2
DTr1
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
(Note: Microdot may be in either location)


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