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CS5165A Datasheet(PDF) 10 Page - ON Semiconductor

Part No. CS5165A
Description  5−Bit Synchronous CPU Buck Controller
Download  18 Pages
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CS5165A Datasheet(HTML) 10 Page - ON Semiconductor

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CS5165A
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10
Figure 13. Normal Operation Showing Output Inductor
Ripple Current and Output Voltage Ripple, 0.5 A Load,
VOUT = +2.84 V (DAC = 10111)
Trace 1− GATE(H) (10 V/div.)
Trace 2− Inductor Switching Node (5.0 V/div.)
Trace 3− Output Inductor Ripple Current (2.0 A/div.)
Trace 4− VOUT ripple (20 mV/div.)
Trace 1− GATE(H) (10 V/div.)
Trace 2− Inductor Switching Node (5.0 V/div.)
Trace 3− Output Inductor Ripple Current (2.0 A/div.)
Trace 4− VOUT ripple (20 mV/div.)
Figure 14. Normal Operation Showing Output Inductor
Ripple Current and Output Voltage Ripple,
ILOAD = 14 A, VOUT = +2.84 V (DAC = 10111)
Transient Response
The CS5165A V2 control loop’s 100 ns reaction time
provides unprecedented transient response to changes in
input voltage or output current. Pulse by pulse adjustment of
duty cycle is provided to quickly ramp the inductor current to
the required level. Since the inductor current cannot be
changed instantaneously, regulation is maintained by the
output capacitor(s) during the time required to slew the
inductor current.
Overall load transient response is further improved through
a feature called “Adaptive Voltage Positioning”. This
technique pre−positions the output capacitors voltage to
reduce total output voltage excursions during changes in load.
Holding tolerance to 1.0% allows the error amplifiers
reference voltage to be targeted +40 mV high without
compromising
DC
accuracy.
A
“Droop
Resistor”,
implemented through a PC board trace, connects the Error
Amps feedback pin (VFB) to the output capacitors and load
and carries the output current. With no load, there is no DC
drop across this resistor, producing an output voltage tracking
the Error amps, including the +40 mV offset. When the full
load current is delivered, an 80 mV drop is developed across
this resistor. This results in output voltage being offset
−40 mV low.
The result of Adaptive Voltage Positioning is that
additional margin is provided for a load transient before
reaching the output voltage specification limits. When load
current suddenly increases from its minimum level, the
output capacitor is pre−positioned +40 mV. Conversely, when
load current suddenly decreases from its maximum level, the
output capacitor is pre−positioned −40 mV (see Figures 15,
16, and 17). For best Transient Response, a combination of a
number of high frequency and bulk output capacitors are
usually used.
If the Maximum On−Time is exceeded while responding to
a sudden increase in Load current, a normal off−time occurs
to prevent saturation of the output inductor.
Figure 15. Output Voltage Transient Response to
a 14 A Load Pulse, VOUT = +2.84 V (DAC = 10111)
Trace 4− VOUT (100 mV/div.)
Trace 3− Load Current (5.0 A/10 mV/div.)
Figure 16. Output Voltage Transient Response to a
14 A Load Step, VOUT = +2.84 V (DAC = 10111)
Trace 1− GATE(H) (10 V/div.)
Trace 2− Inductor Switching Node (5.0 V/div.)
Trace 3− Load Current (5.0 A/div)
Trace 4− VOUT (100 mV/div.)


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