Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

ADG888 Datasheet(PDF) 3 Page - Analog Devices

Part No. ADG888
Description  0.4 OHM CMOS, Dual DPDT Switch in WLCSP/LFCSP/TSSOP Packages
Download  16 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  AD [Analog Devices]
Homepage  http://www.analog.com
Logo 

ADG888 Datasheet(HTML) 3 Page - Analog Devices

 
Zoom Inzoom in Zoom Outzoom out
 3 / 16 page
background image
ADG888
Rev. A | Page 3 of 16
SPECIFICATIONS
VDD = 4.2 V to 5.5 V, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
+25°C
B Version1
Y Version1
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 to VDD
V
On Resistance (RON)
0.4
Ω typ
VDD = 4.2 V, VS = 0 V to VDD, IDS = 100 mA
0.48
0.55
0.6
Ω max
See Figure 16
On Resistance Match Between
Channels (∆RON)
0.04
Ω typ
VDD = 4.2 V, VS = 2.2 V, IDS = 100 mA
0.06
0.07
0.075
Ω max
On Resistance Flatness (RFLAT (ON))
0.07
Ω typ
VDD = 4.2 V, VS = 0 V to VDD
0.11
0.13
0.14
Ω max
IDS = 100 mA
LEAKAGE CURRENTS
VDD = 5.5 V
Source Off Leakage IS (Off )
±0.2
nA typ
VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 17
Channel On Leakage ID, IS (On)
±0.2
nA typ
VS = VD = 1 V or 4.5 V; see Figure 18
DIGITAL INPUTS
Input High Voltage, VINH
2.0
V min
Input Low Voltage, VINL
0.8
V max
Input Current
IINL or IINH
0.005
μA typ
VIN = VINL or VINH
±0.1
μA max
CIN, Digital Input Capacitance
2
pF typ
DYNAMIC CHARACTERISTICS2
tON
22
ns typ
RL = 50 Ω, CL = 35 pF
30
33
35
ns max
VS = 3 V/0 V; see Figure 19
tOFF
13
ns typ
RL = 50 Ω, CL = 35 pF
17
18
19
ns max
VS = 3 V/0 V; see Figure 19
Break-Before-Make Time Delay (tBBM)
9
ns typ
RL = 50 Ω, CL = 35 pF
5
ns min
VS1 = VS2 = 3 V; see Figure 20
Charge Injection
70
pC typ
VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 21
Off Isolation
−67
dB typ
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 22
Channel-to-Channel Crosstalk
−99
dB typ
Adjacent channel; RL = 50 Ω, CL = 5 pF,
f = 100 kHz; see Figure 25
−67
dB typ
Adjacent switch; RL = 50 Ω, CL = 5 pF, f = 100 kHz;
see Figure 23
Total Harmonic Distortion (THD + N)
0.008
%
RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 3 V p-p
Insertion Loss
−0.03
dB typ
RL = 50 Ω, CL = 5 pF; see Figure 24
−3 dB Bandwidth
29
MHz typ
RL = 50 Ω, CL = 5 pF; see Figure 24
CS (Off )
58
pF typ
CD, CS (On)
110
pF typ
POWER REQUIREMENTS
VDD = 5.5 V
IDD
0.003
μA typ
Digital inputs = 0 V or 5.5 V
1
4
μA max
1 Temperature range for the Y version is −40°C to +125°C for the TSSOP and LFCSP; temperature range for the B version is −40°C to +85°C for the WLCSP.
2 Guaranteed by design, not production tested.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn