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ADF4193 Datasheet(PDF) 4 Page - Analog Devices

Part No. ADF4193
Description  Low Phase Noise, Fast Settling PLL Frequency Synthesizer
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADF4193 Datasheet(HTML) 4 Page - Analog Devices

 
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ADF4193
Rev. B | Page 4 of 28
Parameter
B Version1
Unit
Test Conditions/Comments
SW1, SW2, and SW3
RON (SW1 and SW2)
65
Ω typ
RON SW3
75
Ω typ
NOISE CHARACTERISTICS
900 MHz Output3
–108
dBc/Hz typ
@ 5 kHz offset and 26 MHz PFD frequency
1800 MHz Output4
–102
dBc/Hz typ
@ 5 kHz offset and 13 MHz PFD frequency
Phase Noise Figure of Merit5
–216
dBc/Hz typ
@ VCO output with dither off
1 Operating temperature range is from –40°C to +85°C.
2 The prescaler value is chosen to ensure that the RF input is divided down to a frequency that is less than this value.
3 fREFIN = 26 MHz; fSTEP = 200 kHz; fRF = 900 MHz; loop BW = 40 kHz.
4 fREFIN = 13 MHz; fSTEP = 200 kHz; fRF = 1850 MHz; loop BW = 60 kHz.
5 Calculated from the phase noise measured at 5 kHz with a 60 kHz loop BW. Increased noise contribution from the differential amplifier if the loop BW is reduced.
TIMING CHARACTERISTICS
AVDD = DVDD = 3 V ± 10%, VP1, VP2 = 5 V ± 10%, VP3 = 5.35 V ± 5%, AGND = DGND = GND = 0 V, RSET = 2.4 kΩ, dBm referred to
50 Ω, TA = TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
Limit (B Version)1
Unit
Test Conditions/Comments
t1
10
ns min
LE setup time
t2
10
ns min
DATA to CLOCK setup time
t3
10
ns min
DATA to CLOCK hold time
t4
15
ns min
CLOCK high duration
t5
15
ns min
CLOCK low duration
t6
10
ns min
CLOCK to LE setup time
t7
15
ns min
LE pulse width
1 Operating temperature is from −40°C to +85°C.
CLK
DATA
DB23
(MSB)
DB22
DB2
DB1
(CONTROL BIT C2)
DB0 (LSB)
(CONTROL BIT C1)
LE
LE
t2
t4
t5
t3
t7
t6
t1
Figure 2. Timing Diagram


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