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ZL50062GAC Datasheet(PDF) 28 Page - Zarlink Semiconductor Inc |
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ZL50062GAC Datasheet(HTML) 28 Page - Zarlink Semiconductor Inc |
28 / 68 page ZL50062/4 Data Sheet 28 Zarlink Semiconductor Inc. The data throughput delay (T) is: T = 2 frames + (n - m). Assuming that m (input channel) and n (output channel) are equal, we have the figure below, in which the delay between the input data being written and the output data being read is exactly 2 frames. Figure 12 - Data Throughput Delay with Input Ch0 Switched to Output Ch0 Assuming that n (output channel) is greater than m (input channel), we have the figure below, in which the delay time between the input channel being written and the output channel being read exceeds 2 frames. Figure 13 - Data Throughput Delay with Input Ch0 Switched to Output Ch13 Assuming that n (output channel) is less than m (input channel), we have the figure below, in which the delay time between the input channel being written and the output channel being read is less than 2 frames. Figure 14 - Data Throughput Delay with Input Ch13 Switched to Output Ch0 Frame Frame N Frame N+1 Frame N+2 Frame N+3 Frame N+4 Frame N+5 Frame N Data Frame N+1Data Frame N+2 Data Frame N+3 Data Frame N+4 Data Frame N+5 Data Serial Input Data Serial Output Data Frame N-2 Data Frame N-1 Data Frame N Data Frame N+1 Data Frame N+2 Data Frame N+3 Data 2 Frames + 0 Frame Frame N Frame N+1 Frame N+2 Frame N+3 Frame N+4 Frame N+5 Frame N Data Frame N+1Data Frame N+2 Data Frame N+3 Data Frame N+4 Data Frame N+5 Data Serial Input Data Serial Output Data Frame N-2 Data Frame N-1 Data Frame N Data Frame N+1 Data Frame N+2 Data Frame N+3 Data 2 Frames + (n - m) Frame Frame N Frame N+1 Frame N+2 Frame N+3 Frame N+4 Frame N+5 Frame N Data Frame N+1Data Frame N+2 Data Frame N+3 Data Frame N+4 Data Frame N+5 Data Serial Input Data Serial Output Data Frame N-2 Data Frame N-1 Data Frame N Data Frame N+1 Data Frame N+2 Data Frame N+3 Data 2 Frames + (n - m) |
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