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NX25F011B-5S Datasheet(PDF) 20 Page - List of Unclassifed Manufacturers

Part # NX25F011B-5S
Description  1M-BIT, 2M-BIT, AND 4M-BIT SERIAL FLASH MEMORIES WITH 4-PIN SPI INTERFACE
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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NX25F011B-5S Datasheet(HTML) 20 Page - List of Unclassifed Manufacturers

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NexFlash Technologies, Inc.
PRELIMINARY NXSF016F-1201
12/12/01 ©
NX25F011B
NX25F021B
NX25F041B
Transfer All of SRAM to Sector (F3H)
The
Transfer SRAM to Sector command (F3H) will
write the existing contents of the SRAM to the speci-
fied sector in memory. The command sequence is
identical to that of the
Write to Sector command
except that immediately after the sector address field
S[15:0] and 16 control clocks, the
CS pin is asserted
high. This automatically transfers the 264-bytes of
SRAM data to the specified sector in the memory array.
During this time, the array will be busy. Since the entire
264-bytes are transferred, the byte-address field B[15:0]
is not used.
Transfer SRAM
to Sector
Command
Sector
Address*
16 Clocks
SI
SO
F3H
S[15:0]
0000H
*The sector address only uses bits [8:0], [9:0] or [10:0]
Depending on device density
Program Time
(
tWP)
*The sector address only uses bits [8:0], [9:0] or [10:0]
Depending on device density
Transfer Sector
to SRAM
Command
Sector
Address*
32
Clocks
SI
SO
53H
S[15:0]
0000 0000H
Transfer Time
(
tXS)
Transfer All of Sector to SRAM (53H)
The
Transfer Sector to SRAM command (53H) allows the
contents of a sector to be transferred directly to the SRAM
without having to clock or read the sector out of the device
and rewrite it into the SRAM. During the transfer, the SO
output is in a high-impedance state and the TR bit in the
status register will be set to a "1" state. When the last byte
address is transferred the TR bit in the status register will be
cleared. Note that
the Transfer Sector to SRAM Clocked
command (54H) can also be used if partial transfers are
required.


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