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NX25F011B Datasheet(PDF) 17 Page - List of Unclassifed Manufacturers

Part No. NX25F011B
Description  1M-BIT, 2M-BIT, AND 4M-BIT SERIAL FLASH MEMORIES WITH 4-PIN SPI INTERFACE
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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NX25F011B Datasheet(HTML) 17 Page - List of Unclassifed Manufacturers

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NX25F011B
NX25F021B
NX25F041B
NexFlash Technologies, Inc.
17
PRELIMINARY NXSF016F-1201
12/12/01 ©
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Write Disable
Command
8 Clocks
SI
04H
00H
SO
Write Disable (04H)
The
Write Disable command (04H) protects the Flash
memory array from being programmed. Once issued, fur-
ther
Write to Sector or Transfer SRAM to Sector commands
will be ignored. The status of the write protect state can be
read in the status register. The
Write Disable command
sequence is completed by asserting
CS high after eight
additional clocks.
Write Enable
Command
8 Clocks
SI
06H
00H
SO
Write Enable (06H)
Upon power-up, the Flash memory array is write- protected
until the
Write Enable command (06H) has been issued. The
WP pin must be inactive while writing the command for the
write enable to be accepted. The status of the device’s write
protect state can be read in the status register. The
Write
Enable command sequence is completed by asserting
CS
high after eight additional clocks.


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