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SC18IS601IPW Datasheet(PDF) 7 Page - NXP Semiconductors |
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SC18IS601IPW Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 28 page SC18IS600_601_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 13 December 2006 7 of 28 NXP Semiconductors SC18IS600/601 SPI to I2C-bus interface 6.2.1.2 Open-drain output configuration The open-drain output configuration turns off all pull-ups and only drives the pull-down transistor of the pin when the pin latch contains a logic 0. To be used as a logic output, a pin configured in this manner must have an external pull-up, typically a resistor tied to VDD. The pull-down for this mode is the same as for the quasi-bidirectional mode. The open-drain pin configuration is shown in Figure 6. An open-drain pin has a Schmitt-triggered input that also has a glitch suppression circuit. 6.2.1.3 Input-only configuration The input-only pin configuration is shown in Figure 7. It is a Schmitt-triggered input that also has a glitch suppression circuit. 6.2.1.4 Push-pull output configuration The push-pull output configuration has the same pull-down structure as both the open-drain and the quasi-bidirectional output modes, but provides a continuous strong pull-up when the pin latch contains a logic 1. The push-pull mode may be used when more source current is needed from a pin output. The push-pull pin configuration is shown in Figure 8. A push-pull pin has a Schmitt-triggered input that also has a glitch suppression circuit. Fig 6. Open-drain output configuration 002aab883 VSS pin latch data GPIO pin glitch rejection input data Fig 7. Input-only configuration 002aab884 GPIO pin glitch rejection input data |
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